arm: Kconfig: Disable CONFIG_OABI_COMPAT feature on SMP targets

When this option is enabled to support Old ABI, it introduces
a race condition in swap-out code on SMP, such that
instruction is available to the instruction stream (SWI
instruction) but not the data stream.

CPU0		CPU1
clears pte
		executes instruction from page,
		already has I-TLB but no D-TLB entry,
		takes SWI exception
		tries to load instruction, data abort
tlb flush

Therefore, disable this feature on SMP targets.

Change-Id: I4cc4e6924cfcffad391fe2e68d5aa62eee613b0e
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
ARM: hw_breakpoint: Clear breakpoints before enabling monitor mode

The reset value of the BCR, BVR, WCR, and WVR registers are all
UNKNOWN on ARMv7. Unfortunately, reset_ctrl_regs() clears these
registers *after* enabling monitor mode, not before, and so some
implementations may experience UNPREDICTABLE behavior if the
reset values of these registers are non-zero. Clear the
breakpoints before enabling monitor mode so that we don't
experience boot hangs/loops due to breakpoints being enabled
out of reset.

Change-Id: I029fbe40725e803183544ddd6fe40285de4137e8
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
ARM: hw_breakpoint: enable HAVE_HW_BREAKPOINT feature flag

HAVE_HW_BREAKPOINT was disabled temporarily from commit
480a82f59712136b51ee5ca05c4f22c1738010c5. Issue not seen with the
latest kernel hence re-enable the feature and fix merge issue from
previous kernel upgrade.

Change-Id: Ia6e7e8282c848dd73108e4d951b3375bb7caa63c
Signed-off-by: Jin Hong <jinh@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
msm: pm: Add support for retention on each core

Allow each core on 8974 to enter retention and retain
the state of the CPU. On 8960 as hardware restriction does
not permit all cores to enter retention at the same time,
allow only core 0 to enter retention when all other cores
are offline to maintain backward compatibility.

Change-Id: I6690e901afc9fa3a27010c264fa3acc9a0722c1a
Signed-off-by: Priyanka Mathur <pmathur@codeaurora.org>
coresight: temporarily fix build