arm: tegra: p1852: drive touch panel with resolution 1366x768

Enable WXGA display and touch input for p1852 touch panel.

board-p1852-panel.c:
added WXGA timing for atmel touch panel.

board-p1852.c:
initialize touch panel if touch input is defined.

board-p1852.h:
added p1852 touch panel GPIO and bus.

tegra_p1852_gnu_linux_defconfig:
added touch panel flags, not defined by default.

bug 936232

Change-Id: Ia50b991f6aa5ed0ece458ad3871a68684a9234a6
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/101348
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ARM: tegra: p1852: defconfig: Enable PL310_ERRATA_727915

bug 820324

Change-Id: Ia4dec298b3c0cda8cb4e8572b46067b7d06b3758
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/107592
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
mtd: tegra-nor: Fix dma/cpu coherency issues

Call dma sync single api's to maintain coherency between
CPU, dma and device in data transfers.

bug 984029
bug 980884

Change-Id: I50b5a24a7ce482f473670347af3c75d6975c6060
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/105917
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
power: smb349: fix I2C error when unplug ext power

When unplug the external power, SMB349 will reload the OTP setting.
It sometimes caused I2c errors. See bug 996103 and 991401.

Add a 50ms delay when hotplugging the external power to fix the
issue.

SMB349 might mistakenly detect dedicated USB charger as standard
USB device if plug in the USB at low speed. See Bug 996108.

Add a 500ms delay to fix the issue.

Bug 996103
Bug 996108
Bug 991401

Change-Id: I008a45fa221e9a566af64afb1988bbbd7a9f5c79
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/106684
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Avoid aliasing mappings in DMA coherent allocator

Avoid multiple mappings with DMA coherent/writecombine allocator by pre-
allocating the mappings, and removing that memory from the system memory
mapping.  (See previous discussions on linux-arm-kernel as to why this
is bad.)

NB1: By default, we preallocate 2MB for DMA coherent, and 2MB for write
combine memory, rather than 1MB for each in case 1MB is not sufficient
for existing platform usage.  Platforms have the option of shrinking
this down to 1MB DMA / 1MB WC (or even 2MB DMA / 0MB WC) if they so wish.
The DMA memory must be a multiple of 1MB, the write combine memory must
also be a multiple of 1MB, and the two together must be a multiple of
2MB.

NB2: On ARMv6/7 where we use 'normal uncacheable' memory for both DMA
and WC, the two pools are combined into one, as was the case with the
previous implementation.

The down side to this change is that the memory is permanently set aside
for DMA purposes, but I believe that to be unavoidable if we are to
avoid the possibility of the cache getting in the way on VIPT CPUs.

This removes the last known offender (at this time) from the kernel.

Given that DMA memory is fully coherent by this patch, cache
invalidation/clean is not required and so, we skip cache related
activities for the memory managed by the DMA layer. The bus
address -> virtual address conversion normally used in the calling
path and the fact that we remove kernel static mapping corresponding
to the DMA buffers leads to exceptions otherwise.

bug 876019
bug 965047
bug 987589

Change-Id: I72beb386605aafe1a301494a95a67d094ea6b2e4
Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/106212
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
video: tegra: dc: Fix backlight on/off sequence

Register backlight device after tegradc.0 and tegradc.1. This makes
sure turning on/off backlight in correct sequence and eliminates the
flicker during suspending and resuming.

Bug 964626

Change-Id: I16a545b0148faa341b2443c76d9ca4c7eb7f636c
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: http://git-master/r/105611
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Peer Chen <pchen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
video: tegra: dc: Use ref-count to mask vblank interrupt.

Bug 990586

Change-Id: I63da2bd0aaae86070718e0d769b8c9555db18547
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/107714
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
media: video: tegra: ov5650: enable DPC feature

enable Defective Pixel Correction block on sensor SOC.

bug 976218

Change-Id: I754200b7f625509950b061173c7e5de2a831d607
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/104776
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Krupal Divvela <kdivvela@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Amy Deng <amyd@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
smsc95xx: Add module params to read MAC address

This patch adds support for mac_addr module param

mac_addr : MAC address which will be assigned to the
	above device. example
	mac_addr=0x0,0x2,0x2,0x3,0x3,0x4

If EEPROM read fails for MAC address for a smsc
interface and if the mac_addr module param is set
then driver will set that device MAC address provided
in mac_addr. This can be set for only one device

bug 719410, bug 921146

Change-Id: I6eb0363951d91fad857b76af8a4a097cd0fb7623
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/108237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
arm: tegra: p1852: revert previous nor freq change

nor frequency was changed inadvertently in a conflict
resolution.  Need to revert it back to proper value.

Bug 948478

Change-Id: I8d8f778a58b2df64c8fcbf85c182fe3a888d7c03
Signed-off-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-on: http://git-master/r/108247
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ARM: tegra: enterprise: enable auto hotplug

Enabling hotplug detection support for baseband
when it is crashed.

Bug 995784

Change-Id: I75b7a3b79fb8f9e7c6d58b14090637f794e38bad
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/108284
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Alexandre Berdery <aberdery@nvidia.com>
Reviewed-by: Alexandre Berdery <aberdery@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
ARM: tegra: resolve compilation time warnings

- Adding flag to treat warning as error.
- Handling warnings of unused variable, structures and functions,
wrong return type, wrong type comparision.

Bug 949219

Change-Id: I9d02387ce1073c4e46f69d01669285aa3754f1d9
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/104968
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: usb_phy: PMC changes for HSIC remote wakeup

These are the changes for supporting HSIC remote wakeup
and phy-off in auto-suspend.

Bug 889618
Bug 951061

Change-Id: Ifd8144739c5dea49d8019b42b1a608dd13cc29be
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/107606
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
ARM: tegra: usb_phy: Fixing HSIC port power code

Fixing the port power code for HSIC. During USB driver re-designing,
port power code was incorrectly merged. Fixing the code now.

Bug 889618
Bug 951061

Change-Id: I1b65662ed864343911abaffb58439ca2996543e7
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/108302
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
video: tegra: dc: fix bug causing drawing before flipping

The tegra_dc_trigger_windows function was improperly using the
WIN_x_UPDATE bits to determine when a flip has occurred instead of the
WIN_x_ACT_REQ bits. Without this change, it's possible for the postflip
syncpoint for a buffer to get incremented before it actually flips.
Still need to figure out why that's even possible...

Fixes bug 902955

Change-Id: I67ba093a0114646977cc8cb95a040ec4178cebfc
Reviewed-on: http://git-master/r/65389
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nate Huang <nhuang@nvidia.com>
Tested-by: Nate Huang <nhuang@nvidia.com>
Reviewed-on: http://git-master/r/98024
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
media: video: tegra: ar0832: Make focuser range, slew rate tunable

The range parameters & slew rate from the blocks-camera are being passed
down to ODM and then to kernel. Generic structure added for sharing
the data between ODM and kernel instead of specific structure.

Bug 954874

Change-Id: I84656e36a5a2721c007de78aa5c20f5dfeb00361
Signed-off-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-on: http://git-master/r/102077
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
ARM: tegra: dvfs: Update Tegra3 sclk and cbus dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for sclk and cbus clocks
with recent characterization results.

Bug 817679
Bug 841336

Change-Id: I892690aea4c584b34be5dbfcbcd8b35abd86a997
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107777
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: tegra: dvfs: Update Tegra3 display subsystem dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for display and dsi
with recent characterization results. Removed hdmi and crt dvfs
since characterization allows running these modules at max rate
in the entire supported voltage range.

Bug 817679
Bug 841336

Change-Id: I28651a692e30a20536613460ea0e45155a530af7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107778
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: tegra: dvfs: Update Tegra3 I/O dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for nand, nor, spi, and
pwm clocks with recent characterization results. Removed usb, pcie,
and spdif dvfs since characterization allows running these interfaces
in the entire supported voltage range.

Bug 817679
Bug 841336

Change-Id: Iaaa2a3ff8b3c07915f1cb05e7b14da545428888e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107779
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
drivers: cpuquiet: fix error message

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>

Change-Id: If04c699e002542bd8ce4b37b2367d7ec496c284e
Reviewed-on: http://git-master/r/107959
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>