Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)

Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra: MMC: Added/update SDMMC registers/base addresses for T20/T30

Moved SDMMC base addresses into each SoC's main header, since they differ.
Added pad control settings for T30 from the TRM, and added additional
vendor-specific SD/MMC registers and bus power defines.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra30: MMC: Add SD bus power-rail and SDMMC pad init routines

T30 requires specific SDMMC pad programming, and bus power-rail bringup.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.

Tegra30 requires the SD Bus Voltage & Power bits be set in the SD
Power Control register. Tegra20 works w/o them set, but do it anyway
for those SoCs as it's part of the SD spec. Also call a common
board pad init routine (pad_init_mmc) in mmc_reset(), used by
Tegra30 only for now.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boards

Tested on my Cardhu-A04 tablet, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: make bounce buffer option

All Tegra devices will need CONFIG_BOUNCE_BUFFER. Move it to
tegra-common.h to ensure it's always set.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: make CONFIG_CMD_PART common

This is useful on all Tegras, so that boot.scr on all devices can use
the same commands. Hence, move it to tegra-common.h.

Signed-off-by: Stephen Warren <swarren@nvidia.com>