msm: kgsl: Remove ts_notifier_list

Remove ts_notifier_list from the driver since it is not being
used and is causing extra work to be done in the interrupt
handlers for A2XX, A3XX and Z180.

Change-Id: I5512e36f1e807f3a3e62aeac54cfd3075d4cf7a4
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: kgsl: Invalidate base pointers when tlb is flushed

Invalidate the base pointer even when tlb is flushed. For
gpummu the base pointers are invalidated even after just
a tlb flush, with IOMMU do the same.

Change-Id: I11c7d4b841e5f8becd30a087bcabc0ae69c3fee5
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: kgsl: Move the adreno WPTR poke logic to the hang detection

Sometimes a write to CP_WPTR fails to latch on A20x GPUs. In the past
we worked around this by writing to WPTR numerous times in the various
loops that waited for GPU activity.  Consolidate these disparate calls
by moving the poke into the hang detect function.  If the core is idle
but the RPTR != WPTR, then rewrite the WPTR and go back through the
loop again.

Change-Id: Ic0dedbad474c7884c2467fe050d8afe673588add
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: kgsl: Support user specified timeouts in adreno_waittimestamp

We have always allowed the user to specify a timeout in waittimestamp
but we never obeyed it.  Reorgaize the function to be less convoluted
and support a user specified timeout (or spin forever if 0 is passed).

Change-Id: Ic0dedbadbc368336d05b14d66829205631046515
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: kgsl: Make the GPU device aware of the next pending event

The adreno core needs to know what the next event pending for
any given context is so it can mark the interupt to be fired.
If this isn't done then some timestamps that don't have a
matching waittimestamp call won't fire an interrupt. This is
dangerous on the last interrupt/event before a context goes
away.

Change-Id: Ic0dedbad71f6de07b43b0656128c76509326d645
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: kgsl: Remove extra interrupts when setting MMU state

The interrupts added to the ringbuffer on PTFLUSH and TLBUPDATE
were causing a major increase in the number of interrupts from the GPU.
This was leading to increase in power and loss of performance. Add a check
to turn off IOMMU clocks when going to SLEEP.

Change-Id: I41617dd3b7b3f7d9622523f2a1407b912dbd989e
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
diag: Add logs & events streaming support for DCI

Diag driver is adding a new feature to stream logs & events to a
user space application on Linux processor. This will eliminate
need to connect QXDM to receive diag traffic.
This is known as Diag Consumer Interface (DCI).

Change-Id: I7983bb7d9b8a0429ebbee290868c8bd0e562953f
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
diag: Add fixes for DCI

1) Fix an issue where after running a DCI app and exiting it,
 second app does not receive any DCI data. Issue was due to
 incorrect state of a flag used by SMD channel.

2) Add a mutex around shared data structures like cumulative masks.
Multiple clients may want to change DCI mask at the same time, so
mutex will prevent any corruption

3) Add support for health commands. The client request how many logs
were dropped and received.

Change-Id: Ica12b3c93aa4dda9b04aa13cd5a9f8dbc412148c
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
diag: Improve handling of IOCTLs

DIAG kernel driver interacts with user space processes using
IOCTLS. This change adds conditions to avoid potential integer
over/underflow, incorrect buffer copy.

CVE-2012-4220
CVE-2012-4221

Change-Id: Ic1e815051ae9544c911c9a5bd0c9218c1225f6d5
CRs-Fixed: 385352
CRs-Fixed: 385349
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: display: non-blocking for overlay update

Display commit will work as overlay commit when
MDP_DISPLAY_COMMIT_OVERLAY flag is set. It will be
non-blocking if wait_for_finish is false.

Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Change-Id: Ibd143dbfcd2fdd7a8fab3038c5af4e2fbc9ea198
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
iommu/msm: fix the include guard in iommu.h

msm_soc_version_supports_iommu_v1() was defined outside the guard.

Change-Id: I47a579cf14c159c4cbe44b855067c0b82da7b552
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: smsm: Rename LTE Coexistence Bit

The LTE Coexistence bit has been renamed to just SMSM_PROC_AWAKE since
it is now being used for more general is-processor-awake signaling.

Change-Id: I9007c6c91ce3338c790864bf09318edbcb6d50c0
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: smsm: Add processor AWAKE signaling

This processor-awake signaling can be used by remote processors to
determine if the Apps processor is asleep and if so, if it wants to send
data to the Apps processor that would trigger a wakeup sequence.

Change-Id: I4db5891023956b27a91afc2712f9ca053f9648e5
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: display: Clear performance request data in turning on

In resume, previous cached request data needs be cleared as
they do not reflect the current hw status.

Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: iommu: Synchronize access to IOMMU cfg port

Add remote spinlock that allows CPU and GPU to
synchronize access to IOMMU hardware.

Add usage of remote spinlock to iommu driver and
add depenency on SFPB hardware mutex being enabled.`

This feature is not using SFPB hardware mutex. However,
SFPB hardware mutex must be enabled since the remote
spinlock implementation is making use of shared memory
that is normally used when SFPB hardware mutex is not enabled.

Change-Id: I42e11d742e295110843c4b45d6d27cc665d42b7b
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: Kconfig: Enable IOMMU CPU-GPU synchronization

Enable synchronization between CPU and GPU for
IOMMU configuration register accesses.

Change-Id: I7409090c0fc811fa28562644bcbfd4f91a8a7425
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

Conflicts:

	arch/arm/mach-msm/Kconfig
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: kgsl: Synchronize access to IOMMU cfg port

Add a software based spinlock between CPU and GPU.
This spinlock is used to grant mutually exclusive access to
SMMU configuration between CPU and GPU. This mutual exclusion
is required to prevent deadlock in the system.
CRs-Fixed: 409198
Change-Id: Ic375beaaf4c5505b41d3fabc4adf15965d71b13a
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: kgsl: Idle GPU core before programming SMMU from CPU

Always idle the GPU core before programming SMMU from CPU for
SMMU-v1. GPU core was already being idled before programming
the pagetable register, make sure that it's also idle before
programming the tlb invalidate registers. This is required to
prevent a deadlock from happening at the bus level.

Change-Id: Ie901b92028b289fc546ab6186eedd01411d0727e
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm_fb: display: update var in display commit

Need the value of var in display commit to update the double buffers.
If not, double buffering doesn't work in minui (eg. recovery and off-charger
mode)

Change-Id: I1fba52243cc781f18742131759245911d32c9b18
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: display: Fix blend configuration for video layer with MDP composition

With video layer in MDP composition, there is no need to apply destination
over blend rule, as z-order of layers take care of proper staging of layers
by default. Apply constant blend to the video layer when in MDP composition

CRs-fixed: 437965
Change-Id: I7476659f12cdf06018bf6ace829a836c86ae97e8
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>