diag: Handle diag memory pool correctly in diagchar_write

Memory allocated from the diag memory pool was not freed
correctly and mutexes were not unlocked properly. This
change adds fixes the memory leak and the mutex unlocking
issues.

Change-Id: If7bf45586e8bc66ce85ad42ace2397bcb0294801
Signed-off-by: Ravi Aravamudhan <aravamud@codeaurora.org>
mmc: sdhci: propagate execute_tuning error to the caller

Propagate error from host operation execute_tuning to the
caller so that necessary action can be taken accordingly.

Change-Id: I66cf12d974ac1cff914bd866183d0beca66a4cdd
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
mmc: sdhci-msm: Add retry mechanism in case of tuning failure

The specification indicates that the tuning process is normally
shorter than 40 exections of tuning command. Hence, retry the
tuning sequence for at least 3 times before returning the error.

Change-Id: I21724a73af7b997e128b56a2600bdcb12e414996
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
mmc: core: Fix MMC clock scaling in case of tuning failure

When the clock scaling state is changed from MMC_LOAD_LOW to
MMC_LOAD_HIGH, the clocks are first scaled up and then tuning
is performed. But in case of tuning failure, the current code
does nothing but still retain the previous clock scale stats
(state and curr_freq within struct clk_scaling). Hence, correct
it to scale down the clocks in case of tuning failure so that
clock scaling stats reflect the correct status. This also helps
proceed with data transfers at lower clock rate in such cases.

Change-Id: I7e9379d1e3ddc863132af31019604c22a42f8d59
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
cfg80211: fix VHT TDLS peer AID verification

I (Johannes) accidentally applied the first version of the patch
("Allow TDLS peer AID to be configured for VHT"). Now apply just
the changes between v1 and v2 to get the AID verification and
prefer the new attribute over the old one.

Signed-off-by: Jouni Malinen <jouni@qca.qualcomm.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Git-commit: 3d124ea27ae2fc895f81725f0b4c7f3d9c733df4
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
Change-Id: If33cf927dcf6ff8b95b0e0478b8f701b4d899c40
CRs-fixed: 483290
Signed-off-by: Sunil Dutt <duttus@codeaurora.org>
mmc: msm_sdcc: disable sdhci mode during probe

Now that bootloaders support sdhci mode, its possible for them
to leave the sdcc core in sdhci mode after loading the kernel
in ram and pass control to Linux for bootup. In that case if
sdcc driver was enabled, the core wont function as expected
since it happens to be in sdhci mode.

So for sdcc cores that support sdhci mode, disable SDHCi mode
before initializing the sdcc core during probe.

Change-Id: Ib9dfa7dd96d3c67979b51ea39dc4810cd44e5fd3
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
msm: defconfig: 9625: Enable RBCPR v2 stats

Enable feature to read RBCPR (Rapid Bridge Core Power Reduction)
v2 Stats from RPM memory area.

Change-Id: I11e28130579d98e25e0903322319abba7c1ae305
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
msm: mdss: Add read/write buffer support for calibraiton tool

This change allows to process read/write operation through
buffer instead of single IOCTL call. It is part of
optimization to save DIAG packet processing time.

Change-Id: Iffaab2dd160959f8c7950ebca043b1e0cf25877c
Signed-off-by: Arpita Banerjee <cabane@codeaurora.org>
ARM: dts: msm: Add RBCPR stats node for mdm9625

Add a node to allow querying of RBCPR (Rapid Bridge Core Power Reduction)
related stats from RPM data memory

Change-Id: I2037144d01166658e07b169f393c8487c9200dfa
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
msm: board-8610-gpio-mux: Add mux configuration for 8610 touch controller

Add suspend and resume gpio mux configurations for interrupt and
reset gpios used by qrd8610 touch controller

Change-Id: I7d94ec83a4b45846a422430c9166790b58c95f8e
Signed-off-by: Figo Wang <figow@codeaurora.org>
msm: camera: Add support for CAM_STANDBY GPIO

Added CAM_STANDBY GPIO configuration to imx135 and s5k3l1yx
sensor nodes.

Change-Id: I717e4b3b43cfdab00927f92d2007d9bcd4370dae
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
tracing/sched: Track per-cpu rt and non-rt cpu_load.

Add a new tracepoint trace_sched_enq_deq_task to track
per-cpu rt and non-rt cpu_load during task enqueue
and dequeue.

This is useful to visualize and compare the load on
different cpus and also to understand how balanced
the load is at any point of time.

Note: We only print cpu_load[0] because we only care about
the most recent load history for tracking load balancer
effectiveness.

Change-Id: I46f0bb84e81652099ed5edf8c2686c70c8b8330c
Signed-off-by: Arun Bharadwaj <abharadw@codeaurora.org>
cpufreq: ondemand: Fix locking issue in store_powersave_bias

store_powersave_bias takes timer_mutex before calling dbs_timer_exit
which tries to cancel the delayed work do_dbs_timer which in turn
tries to take the same lock. This can cause a lock recursion under
the race condition where can cancel_delayed_work_sync is called
when the work has already started executing.

This can be avoided by taking that lock after calling
dbs_timer_exit.

Change-Id: I7f862286e66f1ddc1e13e4eeee369dd188fc10d5
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
msm: remove fmem support

This functionality is no longer supported.

Change-Id: I52df01acc7deebcfd84e78c333d860e3f3c2eb32
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
msm: kgsl: Add a barrier after writing to V2PUR register

Add a memory barrier after writing to V2PUR register of IOMMU. Without
this barrier the CPU core can stall because of multiple outstanding IOMMU
register transactions happening in parallel. This barrier synchronizes
the multiple IOMMU register transactions and prevents the CPU from
stalling.

Change-Id: I1d715e9fb8287b1f0b009b39b11b5469ab8861c8
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
ARM: dts: msm: add gcc mux to hardware event dt node for 9625

Add support for gcc mux registers to CoreSight Hardware event dt
node for MSM9625. These registers can be configured to generate
GCC Hardware events.

Change-Id: I65abb8ff2b66ea94f26c1ae72a9088c67c8e53b1
Signed-off-by: Aparna Das <adas@codeaurora.org>
ASoC: msm: qdsp6v2: Fix import buffer to map kernel internally

ion_map_kernel call was missed, kvptr wasn't assigned with virtual
address. It may cause delay while it get freed. It can cause crash
if kvptr is accessed.

CRs-fixed: 498425
Change-Id: I017191805686bc5e9ccf774aeaeb5f77624fc219
Signed-off-by: Fred Oh <fred@codeaurora.org>
ASoC: msm: change default Dolby endpoint to EXT speakers

Android endpoint device is mapped to Dolby endpoint device and sent
to DAP post proc module in dsp. Dolby suggests the default device
should be external speakers when we can't find the mapping like in
case of combo devices in use.

Change-Id: Id6ff82f9430538a9e1f75a09a2be7e51cce9977d
Signed-off-by: Jitendra Singh Naruka <jnaruk@codeaurora.org>
msm: kgsl: reset GPU when GDSC is forced on

Sometimes for debug purposes the GPU regulators can be left
on, make sure we reset the gpu while waking up.

Change-Id: Ie18c9f45d9f5a5a7587a1bea2c7c9bb5ce000316
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
cpufreq: ondemand: Disable freq sync feature in store_powersave_bias

Turn off frequency synchronization of CPUs on thread migrations
when powersave bias is enabled. This is done to prevent re-arming
of the dbs timer work (which is cancelled by store_powersave_bias)
by the sync_thread.

Change-Id: I165dd591845c1d66d01a14e8dfc44c767c677b0d
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>