ASoC: msm: Add support for SRS on A2DP

- Enabling or disabling SRS effects[SS3D] on music playback on
  A2DP doesn't have any effect.
- Cause for this is, parameters for SRS effects were not send
  if the device is A2DP.
- Fix is to add a new kcontrol for A2DP and use the new kcontrol
  to send SRS parameters for A2DP case.

Change-Id: I05cb59abadc7e73a91326ec22c3406f77ee06ae6
CRs-fixed: 442631
Signed-off-by: Amal Paul <amal@codeaurora.org>
mach-msm: 8064: Add PCIe support for DMA

Add proper checks for PCIe code on DMA.

Change-Id: I0de1fe756eed2b0fdff4e55b5ef8c271f5d6d24a
Signed-off-by: Bamidi RaviKiran <bamidir@codeaurora.org>
Merge "ASoC: msm: Add support for SRS on A2DP"
msm: dcvs: create cpu freq table dynamically

CPU frequencies can differ between different revisions, so create
the table of cpu frequencies dynamically based on data from
acpuclock rather than using a fixed table.

Some of the data in the table comes from sync points that will be
implemented between CPU and GPU frequencies. The sync points are
defined here, but the sync implementation itself will come in a
subsequent commit.

Change-Id: I24cf17b199df1e5d064c1894b269e49118b39ac7
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
(cherry picked from commit f9a8749b17961be653e9cbb426b1b72cada7f61c)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: dcvs: gpu minimum frequency levels

System performance is enhanced if the gpu frequency is given a
minimum corresponding to various frequency levels of CPU 0.

Change-Id: Iba168d708524fc8ef164428bb5f4e0631a499342
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
(cherry picked from commit 682c7a01c1d86518cdc7bec25cb413498811137b)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: mpdecision: wait at least 100ms between cpu hotremoves

To avoid spending a lot of time at once in the cpu hotremove
path, do not perform multiple hotremoves back to back.

Change-Id: I78a643f73718e4e08786193c71bbe2237aa790d2
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
(cherry picked from commit 9c0aa035f7aeac1b1039125bf27d51d11861fa03)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: dcvs: start and stop temp updates with core sink

Temperature updates should not be sent continuously just
because a core has registered with dcvs. Instead, start
and stop the updates when the core starts and stops as a
dcvs frequency sink.

Change-Id: If7721f523eb44026c421dd7ec4fa3975bc65cd09
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
(cherry picked from commit 4eb5d7cf22bbea963251ff70a7b4e28a2d883b77)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: clock-rpm: Set "last set khz" field to non-zero value during handoff

When a RPM (RPM SMD) clock is handed off, the last set KHz field is not
updated to a non-zero value. This means that despite the clock ref count
being non-zero, a vote will never be sent to RPM till the first non-zero
clk_set_rate() call is made on the clock.

If this call doesn't happen before late init, it's possible that the RPM
will turn off the clock when the application processor is using it. In a
real world scenario, we always get a non-zero clk_set_rate() call before
late init. So, this doesn't cause any real issues. Just fixing it for
completeness sake.

Change-Id: I48f43976e8a64da5060c16fd27b6b77d537b118c
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
(cherry picked from commit ca1528dfb53559d0272002851217b910ffc815e3)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: pil: Add support for ramdumping images

PIL drivers know where their images are going to be loaded and so
they have hard-coded the region of memory reserved for their
image into the kernel to pass to the ramdump function. This has
worked out well so far because the fixed memory map rarely
changes after the development phase. For relocatable images this
won't work because we no longer know where the images reside at
compile time.

Add a new API

	int pil_do_ramdump(struct pil_desc *desc, void *ramdump_dev);

that takes a ramdump device and a pil descriptor and dumps the
image's segments to the ramdump device. This should allow us to
clean up all the PIL drivers so that they just call this function
instead of hard-coding addresses in their driver. It has the
added benefit of making ramdumps work for relocatable images.

Change-Id: Iac4fa64e810529bc7fb9b3269c416f7d43b57418
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 1066777fd91350c325e6583c99d46150307d111a)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: clock: Move parent field into top level struct clk

Maintaining a parent field inside each clock type leads to pointless
repetition of code. Almost all clocks have parents, so move the parent
field to top level struct clk, have it updated whenever the parent changes
for a clock and remove the get_parent ops implementation.

Change-Id: Id897a55d496446a1047322d40d8df041dfea5840
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
(cherry picked from commit 7a6532ee6d387900729f2b12aab0bba6d19600c3)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: clock: Improve clock handoff code.

The current clock handoff code hands off the child clock before handing off
the parent clock. That is technically incorrect since the state and rate of
a clock can't be determined without knowing the state and rate of the
source/parent clock. But this works alright for now since the handoff code
forcefully enables the necessary parent and also assumes that if a clock
has multiple parents, the rates of all those parents are fixed. As we
implement more clocks, this assumption no longer holds true.

The current handoff code also causes the prepare and enable ops to be
called for an already enabled clock. The hardware read/writes caused by
this might not be harmful in the case of most clock hardware designs, but
is not always the case. Eg: PLLs, I2C clocks, etc.

To address these issues, rewrite the clock handoff code so that the parent
clock is identified first, it's handed off and then the child clock is
handed off. Also, when an already enabled clock is handed off, just
directly update the software state of the clock and don't call the ops to
update the hardware. To make sure the parent clock's reference counts are
updated correctly, call clk_prepare_enable() on the parent clock.

This change also has the nice effect of avoiding any "clock stuck off/on"
warnings during boot that are caused by the boot code configuring the
clocks incorrectly (parent off, child on). This is because we don't
actually call the prepare/enable ops and also make sure the parent clocks
is on before calling the handoff code for the child clock.

Change-Id: I385a2afaf62a4138d53048f675822e079be2fcca
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
(cherry picked from commit c85ecf907fb0847d7df85b7a922ea0e74ebbd97a)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: ramdump: Dump ELF format instead of plain memory

Ramdump devices dump memory directly, relying on the users of
the device nodes to know that the file they read may represent
non-contiguous memory segments. In addition, they must know what
addresses those segments pertain to, something that is not easily
determined with relocatable PIL.

Introduce a new API, do_elf_ramdump(), that generates an ELF core
file when you read the device node. This should allow users of
the ramdump device nodes to easily figure out what the ramdump
represents instead of relying on hard-coded knowledge. It also
allows one to use readelf on the file to determine what the
memory regions are, and simplifies loading of the binaries into
debuggers that can understand ELF formats.

Change-Id: I530f72298c7e88fe95c020c6a9b99d8160df2f4c
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 73bab7f8637961ac48c2ffc7e072050f79f8ced6)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: pil-pronto: Add ramdump interface for Pronto

Add Pronto ramdump device and specify it's memory segments. So that
ramdump application can collect Pronto ramdump when it goes thru
subsystem restart level 3.

Change-Id: I3e8079da4101779615d2164c3b4758c607421940
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
(cherry picked from commit b7488b2e03cc696715338d585d6b75c4aaa081ca)

Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: pil: Migrate to pil_do_ramdump() and do_elf_ramdump() APIs

Use the pil_do_ramdump() and do_elf_ramdump() functions to
simplify the PIL ramdumping code. This saves lines of code and
makes ramdumps work for relocatable images in addition to
removing many hard-coded constants and TODOs in the PIL drivers.

Change-Id: I0d22787b035d28fcf7fbaffa9c157a973c375211
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Merge "msm: dcvs: create cpu freq table dynamically"
Merge "msm: dcvs: gpu minimum frequency levels"
Merge "msm: mpdecision: wait at least 100ms between cpu hotremoves"
Merge "msm: dcvs: start and stop temp updates with core sink"
Merge "msm: clock-rpm: Set "last set khz" field to non-zero value during handoff"
Merge "msm: clock: Move parent field into top level struct clk"