ARM: tegra: cpuquiet: Bring back hotplug stats support

Hotplug stats are needed for dfs_log and Power Signature. Cpuquiet
provides similar stats in the core layer, but cannot provide stats for
LP cpu, since this is only visible at the driver level.

Bug 1045785

Change-Id: I6c5c26912d1a26637e81c73741637fbd2bee6157
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/131210
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Shaoming Feng <shaomingf@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit

Conflicts:
	arch/arm/mach-tegra/cpuquiet.c
ARM: tegra: refactor cpuquiet driver

Refactor the cpuquiet driver to use 1 workqueue which handles the
clusterswitch and cpu online/offline operations.

Functional changes compared to the previous driver:

+ changing no_lp also triggers a clusterswitch if the current cluster is the
  LP cluster.

+ removing all QoS constraints will return to the configuration as defined by
  the governor.

+ the minimum CPUs online QoS constraint will always prevail above the maximum
  CPUs online constraint. If both constraints are set, the maximum CPUs online
  constraint will be clamped to the minimum constraint.

bug 1047545
bug 1055406

Change-Id: Ib52de2578254c282f23f972484a6532d24fdc0e9
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/134391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Conflicts:
	arch/arm/mach-tegra/cpuquiet.c
cpuquiet: enable by default
tegra camera: remove power saving core pluging for now
ARM: tegra: Use GIC IRQ/FIQ as LP2 wake event

Whenever possible, GIC IRQ/FIQ should be used to wake up CPUs in LP2,
this can be done by setting up wake-up condition as WAIT-FOR-EVENT
and event sources as GIC IRQ/FIQ.

This is supported coincidentally in all SoCs with symmetric CPU power
gating.

Change-Id: I7fafee5218b5db386fc993a064c53295c9c7e60b
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/117111
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: clock: Add cross-clock locking option

Added an option to serialize clock operations for several clocks
(in addition to individual clock locking). This option may be used,
for example, when moving clocks between virtual buses or to support
clocks with different dvfs tables, but common enable control.

Change-Id: I88b366d4109bdb6ae952385dd84fab392715ac10
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/117247
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Conflicts:
	arch/arm/mach-tegra/clock.h
video: tegra: avp: Fix uninitialized variable

Change-Id: Ia479bb2d5bce94bac1265a4ab29ab23031b9540d
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/117172
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: clock: Reduce Tegra3 pll post-lock delay

Reduced pll post-lock delay from 50us to 2us.

Rearranged wait for lock loop to delay first check of lock bit
by 2us after pll is enabled.

Added read fence for PLLM lock via PMC (in this case enable bit is
in APB bus register, but lock detect bit is in PPSB bus register).

Bug 1017271

Change-Id: Ibc963533854383e884d87be61e1b98e9d54d3ea0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115933
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ARM: tegra: New macro name for LP2 timer config

The config macro TEGRA_LP2_ARM_TWD was defined when only Cortex-A9
was used in Tegra SoC, but the feature enabled by this configuration
option is not just for Cortex-A9. In fact, any CPU with private timer
can make use of this feature. Therefore, change macro name to a more
generic one "TEGRA_LP2_CPU_TIMER" so it can be used with new CPU
architecture (CortexA15)

Change-Id: I6903dba056c554c72bb8d1416df90145a4043295
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/118099
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

Conflicts:
	arch/arm/mach-tegra/Kconfig
	arch/arm/mach-tegra/cpuidle-t3.c
ARM: tegra: cpuquiet: Fix compiler warnings

Bug 1055406

Change-Id: I5033cc19e170d932c3697821a0f3273957789995
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/164384
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
ARM: tegra: avoid race condition between cpufreq and clusterswitch

Avoid a race condition between cpufreq and clusterswitch and also make writes
to no_lp and enable synchronous operations.

bug 1178947

Change-Id: Ib9608f8a0a22be84d3c0916babb7e43c1f6df2e1
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/165751
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
ARM: tegra: Rework timer for clusterswitching

This patch introduces a separate timer for clusterswitching. The timer will
queue the usual workitem on expiry. This allows all other operations to
happen immediately without having to cancel a delayed workitem. It also allows
the timer itself to be canceled when the conditions for a clusterswitch are
no longer fulfilled.

bug 1178947

Change-Id: Ieb63baf5a38ebcca29ad938365e46530f755a105
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
(cherry picked from commit 1dec3e79989d37f46c585a5265276bc2871c87a7)
Reviewed-on: http://git-master/r/170634
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
ARM: tegra: only do clusterswitching in 1 CPU mode

Only consider clusterswitching when there is a single CPU online.
This is done by ignoring frequency changes when there are more cores
online and registering a notifier to immediately switch to the slow
cluster if there is only 1 CPU online and the frequency is below
idle_bottom_freq.

bug 1178947
bug 1202877

Change-Id: I1244f866de1d32c268d36c835cd90d9c6cba1481
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/172346
(cherry picked from commit 309a2860fa6784d7e35ee114cf061599b19c4d91)
Reviewed-on: http://git-master/r/173718
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
ARM: tegra: Only check for LP switch on CPU_POST_DEAD

Apparently the cpu hotplug notifier can be called when the kernel can't sleep.
In those cases blocking operations can cause a kernel panic. Solve this by
only doing potentially blocking operations when a CPU has been removed. This
shouldn't cause any power regressions as we can only switch to the slow
cluster when only CPU0 is online.

Bug 1189926
Bug 1211686
Bug 1213817

Change-Id: I54356d2a8a8ae3a5253b9b2c216ada283955e585
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/189105
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Ankit Gupta (SW-TEGRA) <ankitgu@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
ARM: tegra: cpuquiet: fix race condition

Remove race conditions around cpq_state access

Bug 1225764

Change-Id: I73f28b81d9488633294eaa04369f15993f742cb0
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/197265
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
video: tegra: dc: use trace events

Use trace events instead of trace_printk.
Removed some unnecessary traces.

Bug 990469

Change-Id: I060369b12c852b5584634641b8971e23f60fc399
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/138797
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Conflicts:
	drivers/video/tegra/dc/dc_priv.h
tegra hdmi: fix build errors
ARM: tegra: cpuquiet: Honor G->LP delay on last core down

We cluster switch G->LP when 2 conditions are met:
1) we are in single core mode
2) CPU freq reaches idle_bottom_freq

After these 2 conditions are met, we wait for down_delay ms before
cluster switching. This patch ensures the timeout is also honored when
the first condition is met last.

Bug 1226607

Change-Id: Ic36f9cab09a5967b71409e44dbe89290f39cb26b
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/200537
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
Revert "ARM: tegra: cpuquiet: fix race condition"

This reverts commit 5c660c72403a2697d753f472eae9d1a02d9b0d9b.
cputegra: fix warning