Implemented structs for ordered cyclic pwm and designed basic idea

Still needs phase/duty cycle implementation
Completed implementation of the ordered cyclic pwm

Requires much testing
Fixed issue where pwm module's event was never updated
Simplified tracking of target time values

Reduced what was previously kept as an absolute phase/duty in the pwm signal to simple target values for the pwmevent struct simplifying the structures and a bit of code.
Fixed small errors and spelling mistakes to enable compilation of modified
pwm module
Made ordered cyclic pwm functional

Fixed minor issues and tested code. Generates correct signals for motor
and pwm.
Reassigned timers used by pwm

Because pwm is now setup to use all the wide timers, the timers used in time.c were remapped. It now uses Timer 5 as a full 32 bit one shot and the SysTick for clock updates. Unfortunately the SysTick on the LM4F is only 24bits, and with a speed of 50MHz means that it can't last for a full second. SysTick now should just interrupt as slow as possible and adjust the clock accordingly (which occurs about 3 times a second). None of these changes should be noticable outside of the time module.
Finished Testing new pwm generation and modified timing module.

Completely funcitoning, and allows for more pwm signals then we have pins
at little loss of processing capabilities.
Merge pull request #14 from ut-ras/ordered_cyclic_pwm

Merge `Ordered Cyclic PWM`