Fixed parsing of module arguments when one type is used for many args
Large improvements in yosys-config
Install simlib in datdir
Added "make config-sudo"
Added init= attribute for fpga-style reset values
Updated TODOs in README file
Implemented part/bit select on memory read
Fixed name resolution of local tasks and functions in generate block
Added "synthesis" in (synopsys|synthesis) comment support
Do not allow memory bit select on the left side of an assignment
Implemented indexed part selects
Another name resolution bugfix for generate blocks
Added "add" command (only wires for now)
Fixed ilang parser: memory width
Added "proc_arst -global_arst" feature
Fixed a bug in "add -global_input"