LoopVectorize: Math functions only read rounding mode

Math functions are mark as readonly because they read the floating point
rounding mode. Because we don't vectorize loops that would contain function
calls that set the rounding mode it is safe to ignore this memory read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185299 91177308-0d34-0410-b5e6-96231b3b80d8
The build system is currently miss-identifying GNU/kFreeBSD as FreeBSD.
This kind of simplification is sometimes useful, but in general it's not correct. 

As GNU/kFreeBSD is an hybrid system, for kernel-related issues we want to match the
build definitions used for FreeBSD, whereas for userland-related issues we want to
match the definitions used for other systems with Glibc.

The current modification adjusts the build system so that they can be distinguished,
and explicitly adds GNU/kFreeBSD to the build checks in which it belongs.

Fixes bug #16444.

Patch by Robert Millan in the context of Debian.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185311 91177308-0d34-0410-b5e6-96231b3b80d8
Added the test missed from r185080.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185316 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-symbolizer: Recognize a drive letter on win32. Then "REQUIRES: shell" can be removed.

FIXME: Could we use llvm::sys::Path here?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185322 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185328 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185329 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Add support for native SIGN_EXTEND_INREG where available

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185330 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Handle signext/zeroext attributes properly

Fix a case where we were incorrectly sign-extending a value when we should have been zero-extending the value.

Also change some SIGN_EXTEND to ANY_EXTEND because we really dont care and may have more opportunity to fold subexpressions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185331 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Fix vector loads from parameters that span multiple loads, and fix some typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185332 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] 64-bit ADDC/ADDE are not legal

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185333 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Cut down on physical register defs

We are using virtual registers throughout now, but we still need
to keep a few physical registers per class around to keep the
infrastructure happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185334 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] We dont use NVBuiltin anymore

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185335 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Add support for module-scope inline asm

Since we were explicitly not calling AsmPrinter::doInitialization,
any module-scope inline asm was not being printed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185336 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: relax the atomic release barrier to "dmb ishst"

I believe the full "dmb ish" barrier is not required to guarantee release
semantics for atomic operations. The weaker "dmb ishst" prevents previous
operations being reordered with a store executed afterwards, which is enough.

A key point to note (fortunately already correct) is that this barrier alone is
*insufficient* for sequential consistency, no matter how liberally placed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185339 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Add variants of "sync" instruction

This adds support for the "sync $L" instruction with operand,
and provides aliases for "lwsync" and "ptesync".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185344 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Add some existing instructions to ppc64-encoding-bookII.s

The test case had a couple of FIXMEs where the instruction is in
fact already supported by the back-end.  In some other case, while
the generic form of the instruction is not yet supported, a
specialized form is.  This adds tests for those already supported
instructions / instruction forms.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185347 91177308-0d34-0410-b5e6-96231b3b80d8
Added c++ mode selector to head of SelectionDAGBuilder.h so editors open it in c++ mode instead of c mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185348 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Support "eieio" instruction

This adds support for the "eieio" instruction to
the asm parser.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185349 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Add "wait" instruction

This adds the "wait" instruction and its extended mnemonics.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185350 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Fix @got references to local symbols

A @got reference must always result in a relocation, so that
the linker has a chance to set up the GOT entry, even if the
symbol happens to be local.

Add a PPCELFObjectWriter::ExplicitRelSym routine that enforces
a relocation to be emitted for GOT references.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185353 91177308-0d34-0410-b5e6-96231b3b80d8