UART Comm module added. Work in progress.
UART Comm now successfully reports its INFO in simulation, as well as giving PONG and INVALID responses.
Reorganizing directory structure and cleaning some of the old projects up.
Cleaned out DE2_115_NIOS_Ethernet project.
Added CRC32 core.
Added CRC checks to the uart_comm module.
Improved the testbench for uart_comm and added support for ACK, QUEUE_JOB, and PUSH_JOB.
Added testbench for job queueing and pushing and fixed a bug.
Testing patch for JTAG Comm module when multiple FPGAs are in a single chain.
Updated Synthesis options for X6000_ztex_comm4
Another patch for multi-FPGA device chains in jtag_comm.v.
Patched checksum calculation for multi-FPGA device chains in jtag_comm.v
A DSP48E1 based mining core targetting the KC705 development has been added. Currently runs at 400MH/s and uses UART for communication.
Removed WebTalk data from KC705_experimental project.