Build fix for Android NDK which has neither futimes nor futimens

Based on a patch by Neil Henning!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197045 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: constrain register-class in fast-isel

The tests were no longer using fast-isel at all (MachO needs an "ios" rather
than "darwin" triple at the moment and Linux needs ARM mode). Once that was
corrected, the verifier complained about a t2ADDri created for the alloca.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197046 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG: Fix a typo.

Found by "cppcheck". PR18208.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197047 91177308-0d34-0410-b5e6-96231b3b80d8
[arm] Implement ARM .arch directive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197052 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Register R600EmitClauseMarkers pass

This enables -print-before-all to dump MachineInstrs after it is run.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197056 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Register AMDGPUCFGStructurizer pass

This enables -print-before-all to dump MachineInstrs after it is run.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197057 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Re-format Processors.td

This makes it a little easier to read.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197058 91177308-0d34-0410-b5e6-96231b3b80d8
[arm] Pass -triple to llvm-mc for ARM ELF test cases.

Replace -arch with -triple so that we can guarantee that
ELF object files can be generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197062 91177308-0d34-0410-b5e6-96231b3b80d8
Don't set unused variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197064 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Refactor the NEON scalar floating-point reciprocal estimate, floating-
point reciprocal exponent, and floating-point reciprocal square root estimate
LLVM AArch64 intrinsics to use f32/f64 types, rather than their vector
equivalents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197066 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Refactor the NEON scalar floating-point reciprocal step and
floating-point reciprocal square root step LLVM AArch64 intrinsics to
use f32/f64 types, rather than their vector equivalents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197067 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Add NEON scalar floating-point compare LLVM AArch64 intrinsics that
use f32/f64 types, rather than their vector equivalents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197068 91177308-0d34-0410-b5e6-96231b3b80d8
DwarfUnit: LLVM_OVERRIDE and constify some functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197072 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: Move type units into the debug_types section with appropriate comdat grouping and type unit headers

This commit does not complete the type units feature - there are issues
around fission support (skeletal type units, pubtypes/pubnames) and
hashing of some types including those containing references to types in
other type units.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197073 91177308-0d34-0410-b5e6-96231b3b80d8
Remove test thats testing the same thing as tls.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197074 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "DebugInfo: Move type units into the debug_types section with appropriate comdat grouping and type unit headers"

This reverts commit r197073.

The test seems to be failing on some buildbots for unknown reasons.
Reverting until I can figure that out. If anyone's got a reproduction
(.s and .o together would be great) - I'd really appreciate it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197079 91177308-0d34-0410-b5e6-96231b3b80d8
On ELF and COFF treat linker_private like private.

The linkers on these systems don't have anything special to do with these
symbols. Since the intent is for them to be absent from the final object,
just treat them as private.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197080 91177308-0d34-0410-b5e6-96231b3b80d8
Merge all tls tests to two files. One for normal codegen (initial and local
exec) and one for PIC codegen (local and general dynamic).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197081 91177308-0d34-0410-b5e6-96231b3b80d8
Add two additional hazard recognizer functions

This adds two additional functions to the hazard recognizer interface. These
are optional (in the sense that the default implementations preserve the
current behavior), and used by the post-RA scheduler. Upcoming commits will use
this functionality in order to improve dispatch-group formation on the POWER7
and related cores. Dispatch groups are an odd construct: sometimes we need to
insert nops to force a new one to start (for performance reasons), and some
instructions need to appear in certain positions within a group, but the groups
are not fundamentally cycle based (they can contain instructions with data
dependencies with non-trivial latencies).

Motivation:

unsigned PreEmitNoops(SUnit *) - Used to force the post-RA scheduler to insert
nops to force a new dispatch group to begin. We already have a NoopHazard, and
this is also still needed. However, NoopHazard only causes a nop to be inserted
if there are no other available instructions, and so is not always sufficient.
The number of nops to insert depends on state that only the hazard recognizer
has, so a general callback is necessary.

bool ShouldPreferAnother(SUnit *) - Used to avoid scheduling instructions that
would start a new dispatch group when others are available that could be part
of the current dispatch group. In this case, we don't want to issue nops,
because the non-preferred instruction will implicitly start a new dispatch
group regardless.

Although the motivation for these functions is driven by the PowerPC backend,
they are completely general.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197084 91177308-0d34-0410-b5e6-96231b3b80d8
Fix the PPC subsumes-predicate check

For one predicate to subsume another, they must both check the same condition
register. Failure to check this prerequisite was causing miscompiles.

Fixes PR18003.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197089 91177308-0d34-0410-b5e6-96231b3b80d8