msm_fb: display: Allocate writeback buffers of panel resolution sizes

Allocate MDP writeback buffers based on panel resolution size
dynamically

Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Change-Id: I4a456199a05850f35c204edfa7ae3679036138a9
msm_fb: display: add mixer1 writeback buf init call

mdp4_init_writeback_buf call is missing for mixer1 interface. And
blt_addr should be nulled when dtv interface is initialized,
otherwise, mixer1 writeback mode may be false enabled which causes
system crashes or garbage display on TV.

Change-Id: Idbf5fe90eb50f0a68b434f2c76012c64a38553a4
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: Add clk prepare changes to MDP and rotator

Use clk_prepare_enable and clk_disable_unprepare instead of
clk_enable and clk_disable respectively.

CRs-Fixed: 351340
Change-Id: Ifb2a9405b8f445a90277d2fade9ab33f5becbd6e
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: remove mdp writeback2 overlay kickoff waiting

Before overlay2 kickoff, there is already a dma busy waiting, so once
overlay is kicked off, mdp driver can safely return to userspace. Then
if there is another request while ovlay2 is still busy, dma busy can
take care of it.

Change-Id: Ibb45a8b306a393c8e240fc64b5857e8700afcaba
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: add YUV444 interleave format support to mdp

Add support for H1V1 interleave (YUV444) to mdp

Change-Id: I86b76831ad87dede90ddd8d8f5ae64e51fa28c27
Signed-off-by: Kyong Hwa Bae <kbae@codeaurora.org>
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: update dtv panel info clk rate

dtv panel clk rate is dynamically changed with the HDMI
resolution. s/w panel info needs to keep its clk rate updated.

CRs-fixed: 355110
Change-Id: I9365d67820158afb2bc520736df9152864a2a962
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: increase mdp upscaling range

The old range is x8. Acturally mdp rgb or vg pipes can scale up more
than that. The max up to x20 is verified.

CRs-fixed: 340747
Change-Id: Ief7ee936e39de2ada87d47b14872bca0c3cf36a7
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: add dtv wait for vsync when in blt mode

Currently dtv is waiting for overlay done when in blt mode. When dtv
frame rate is low, this return may be too soon. So before dmae
finishes updating buffer, the buffer may be overwritten by userspace.
Add dtv wait4vsync after overlay done to lock the buffer untill the
next vsync to avoid tearing or flicking.

Change-Id: Ic57544a5305fdf9081bfeeccd8d364395faaf602
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: Move mipi dsi clock enable before dsi soft reset

mipi_dsi_clk_enable() is called after dsi soft reset. Move mipi dsi clock
enable before dsi soft reset as per mipi dsi hardware design document.

Change-Id: Ie1cfdf53bc74b87b5a0e0679ab26bc513205673d
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: Flush MDP registers before staging up any pipe

Add flush calls to MDP's pipe and mixer registers before staging
up any pipe to a mixer.

Change-Id: I36f5aa04634bae43a38e57cd97bd2aafe9631eda
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay.c
msm_fb: display: Fix invalid x offset programming for YUV444 fmt

Source x offset adjustment is not properly programmed for YUV444 format,
it is always programmed as 0. Add support for correct x offset
adjustment.

Change-Id: I73e87f961bda60670cc764c66be955e48ccf2734
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: Flush background pipe after solid fill configuration

For is_fg support on a foreground pipe, the  background pipe is
currently set to Solid Fill mode without being flushed. Add flush
after enabling Solid Fill on background pipe.

CRs-fixed: 352855
Change-Id: I91c4e391c9577a9198d048d2b369369d348efeab
Signed-off-by: Amara Venkata Mastan Manoj Kumar <manojavm@codeaurora.org>
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: Free staged foreground pipes during suspend

During suspend, some foreground pipes might still be staged and
have to be removed before disabling timing generator.
So, these pipes are staged down and freed before timing generator
is switched off.

Change-Id: I3f2376cac43464c64cd1c9e2f16f3d801298c25d
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: Display: Add additional settings to improve DSI signal strength.

Modify/add new Physical layer settings for Lane,
BIST and PHY strength to improve the rise/fall time of
the DSI clock waveform.

CRs-Fixed: 364037
Change-Id: Ie2503100eebdf9d4c82d457c187ab8fa903778c6
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
msm-fb: display: lm2 writeback support on mpq platfroms

lm2 writeback has broken on mpq platfroms as lm1 and lm2 are
selecting the same axi writeback path. It adds the support
to select the right axi writeback path based the availability
of the write master

Change-Id: Ia6b868ff13de5edc641e4795794286893c063e66
Signed-off-by: Nagamalleswararao Ganji <nganji@codeaurora.org>
msm_fb: display: Set the minimal sleep time for DSI PHY Initialisation

On 7x27A/8x25, set the minimal sleep time required for DSI PHY
hardware to get initialized and for the display to come up.

CRs-fixed: 367652
Change-Id: If040a5ac37f694e83b819ecf08fc80f2afb7afaa
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>

Conflicts:

	drivers/video/msm/msm_dss_io_7x27a.c
msm_fb: display: Clear background solid fill on closing video pipe

Clear background pipe's solid fill setting on closing Video pipe
to avoid blink issues in display

Change-Id: Iac3c884334f38580fb5c9dbfb260dd6940ef5019
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: switch mdp mode without turning off timing generator

MDP need to be in idle state before switching to different mode.
Dmap_done interrupt is delivered when the last line of frame is
clocked out. Therefore mdp is in idle state during dmap_done ISR.
This patch execute mdp mode switching inside dmap_done ISR.
Therefore timing generator is not necessary to be turned off
since mdp is in idle state already.

CRs-fixed: 350154
Change-Id: Ib10557bde90856ffd5284a0a76dddbe92f2abc0e
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: Add support for 4 layer MDP composition

Add 4 layers composition support to MDP by allowing borderfill
pipe to be used as base layer of mdp blending. This releases
RGB1 base pipe which can be used as a general purpose pipe.

Change-Id:I517485d738e8bb555a263b3ea885d78d5e4f4396
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: change ion memory map for mdp mixer2 writeback

One way that mdp mixer2 gets writeback address is to get ion memory fd
from userspace, then mdp driver maps this fd in kernel. When mdp iommu
domain was not enabled, this maps to a physical address. Now after mdp
iommu domain is enabled, the map is changed to an iommu virtual addr.

Change-Id: I461a00cc93169de586565834af4fb9a43949cf95
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>