modpost: Ignore ARC specific non-alloc sections

ARC relocatable object files contain one/more .gnu.linkonce.arcextmap.*
sections (collated by kernel/vmlinux.lds into .arcextmap in final link).
This section is used by debuggers to display the extension instructions
and need-not be loaded by target (hence !SHF_ALLOC)

The final kernel binary only needs .arcextmap entry in modpost's ignore
list (section_white_list[]). However when building modules, modpost scans
each object file individually, hence tripping on non-aggregated
.gnu.linkonce.arcextmap.* entries as well.

Thus need for the 2 entires !

Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: Generic Headers

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: irqflags - Interrupt enabling/disabling at in-core intc

ARC700 has an in-core intc which provides 2 priorities (a.k.a.) "levels"
of interrupts (per IRQ) hencforth referred to as L1/L2 interrupts.

CPU flags register STATUS32 has Interrupt Enable bits per level (E1/E2)
to globally enable (or disable) all IRQs at a level. Hence the
implementation of arch_local_irq_{save,restore,enable,disable}( )

The STATUS32 reg can be r/w only using the AUX Interface of ARC, hence
the use of LR/SR instructions. Further, E1/E2 bits in there can only be
updated using the FLAG insn.

The intc supports 32 interrupts - and per IRQ enabling is controlled by
a bit in the AUX_IENABLE register, hence the implmentation of
arch_{,un}mask_irq( ) routines.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
ARC: atomic/bitops/cmpxchg/barriers

This covers the UP / SMP (with no hardware assist for atomic r-m-w) as
well as ARC700 LLOCK/SCOND insns based.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
asm-generic headers: uaccess.h to conditionally define segment_eq()

This is because mm_segment_t is exported by arch code, while seqment_eq
assumes it will have .seg element.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: uaccess friends

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
asm-generic: uaccess: Allow arches to over-ride __{get,put}_user_fn()

As of now these default to calling the arch provided __copy_{to,from}_user()
routines which being general purpose (w.r.t buffer alignment and lengths)
would lead to alignment checks in generated code (for arches which don't
support unaligned load/stores).

Given that in this case we already know that data involved is "unit"
sized and aligned, using the vanilla copy backend is a bit wasteful.

This change thus allows arches to over-ride the aforementioned routines.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
ARC: [optim] uaccess __{get,put}_user() optimised

Override asm-generic implementations. We basically gain on 2 fronts

* checks for alignment no longer needed as we are only doing "unit"
  sized copies.

  (Careful observer could argue that While the kernel buffers are aligned,
   the user buffer in theory might not be - however in that case the
   user space is already broken when it tries to deref a hword/word
   straddling word boundary - so we are not making it any worse).

* __copy_{to,from}_user( ) returns bytes that couldn't be copied,
  whereas get_user() returns 0 for success or -EFAULT (not size). Thus
  the code to do leftover bytes calculation can be avoided as well.

The savings were significant: ~17k of code.

bloat-o-meter vmlinux_uaccess_pre vmlinux_uaccess_post
add/remove: 0/4 grow/shrink: 8/118 up/down: 1262/-18758 (-17496)
							^^^^^^^^^
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
asm-generic headers: Allow yet more arch overrides in checksum.h

arches can have more efficient implementation of these routines

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: checksum/byteorder/swab routines

TBD: do_csum still needs to be written in asm

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: Fundamental ARCH data-types/defines

* L1_CACHE_SHIFT
* PAGE_SIZE, PAGE_OFFSET
* struct pt_regs, struct user_regs_struct
* struct thread_struct, cpu_relax(), task_pt_regs(), start_thread(), ...
* struct thread_info, THREAD_SIZE, INIT_THREAD_INFO(), TIF_*, ...
* BUG()
* ELF_*
* Elf_*

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: spinlock/rwlock/mutex primitives

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: string library

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: Low level IRQ/Trap/Exception(non-MMU) Handling

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Al Viro <viro@ZenIV.linux.org.uk>
ARC: Interrupt Handling

This contains:
-bootup arch IRQ init: init_IRQ(), arc_init_IRQ()
-generic IRQ subsystem glue: arch_do_IRQ()
-basic IRQ chip setup for in-core intc

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
ARC: Non-MMU Exception Handling

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: syscall support

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
ARC: backend for process-creation/scheduling/idle-task

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: Timers/counters/delay management

ARC700 includes 2 in-core 32bit timers TIMER0 and TIMER1.
Both have exactly same capabilies.

* programmable to count from TIMER<n>_CNT to TIMER<n>_LIMIT
* for count 0 and LIMIT ~1, provides a free-running counter by
    auto-wrapping when limit is reached.
* optionally interrupt when LIMIT is reached (oneshot event semantics)
* rearming the interrupt provides periodic semantics
* run at CPU clk

ARC Linux uses TIMER0 for clockevent (periodic/oneshot) and TIMER1 for
clocksource (free-running clock).

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: RTSC insn for true 64bit clocksource / sched_clock()

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>