More direct types in PowerPC AltiVec intrinsics.

This patch follows up on work done by Bill Schmidt in r178277,
and replaces most of the remaining uses of VRRC in ISEL DAG patterns.

The resulting .inc files are identical except for comments, so
no change in code generation is expected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178656 91177308-0d34-0410-b5e6-96231b3b80d8
Remove some obsolete PowerPC/README entries

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178657 91177308-0d34-0410-b5e6-96231b3b80d8
PPC: Add a FIXME regarding the non-working fma+fneg Altivec pattern

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178658 91177308-0d34-0410-b5e6-96231b3b80d8
PPC: Enable FRES and FRSQRTE on the default PPC64 description

I discussed this with Bill Schmidt on IRC, and it was decided that this is a
safe and reasonable default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178659 91177308-0d34-0410-b5e6-96231b3b80d8