+ Added mips32r2 opcodes needed for pic32.
* Output registers of type R_SPECIALREGISTER as numbers.
+ For MTC0/MFC0 instructions, set type of first operand to R_SPECIALREGISTER, since it designates a coprocessor register.


git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@24799 3ad0048d-3df7-0310-abae-a5850022a9f2