R600: Move instruction encoding definitions into a separate .td file

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184013 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Factor the instruction encoding out the RAT_WRITE_CACHELESS_eg class

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184014 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman

We were using RAT_INST_STORE_RAW, which seemed to work, but the docs
say this instruction doesn't exist for Cayman, so it's probably safer
to use a documented instruction instead.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184015 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Use correct encoding for Vertex Fetch instructions on Cayman

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184016 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the LLVM specific archive index.

Archive files (.a) can have a symbol table indicating which object
files in them define which symbols. The purpose of this symbol table
is to speed up linking by allowing the linker the read only the .o
files it is actually going to use instead of having to parse every
object's symbol table.

LLVM's archive library currently supports a LLVM specific format for
such table. It is hard to see any value in that now that llvm-ld is
gone:

* System linkers don't use it: GNU ar uses the same plugin as the
linker to create archive files with a regular index. The OS X ar
creates no symbol table for IL files, I assume the linker just parses
all IL files.

* It doesn't interact well with archives having both IL and native objects.

* We probably don't want to be responsible for yet another archive
format variant.

This patch then:

* Removes support for creating and reading such index from lib/Archive.
* Remove llvm-ranlib, since there is nothing left for it to do.

We should in the future add support for regular indexes to llvm-ar for
both native and IL objects. When we do that, llvm-ranlib should be
reimplemented as a symlink to llvm-ar, as it is equivalent to "ar s".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184019 91177308-0d34-0410-b5e6-96231b3b80d8
Remove empty directory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184020 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Add SI load support for v[24]i32 and store for v2i32

Also add a seperate vector lit test file, since r600 doesn't seem to handle
v2i32 load/store yet, but we can test both for SI.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184021 91177308-0d34-0410-b5e6-96231b3b80d8
[yaml2obj] Add support for sh_link via `Link` key.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184022 91177308-0d34-0410-b5e6-96231b3b80d8
[yaml2obj] Move some classes into anonymous namespaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184025 91177308-0d34-0410-b5e6-96231b3b80d8
Debug Info: Don't print the display name and colon prefix for DEBUG_VALUE comments if the display name is empty

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184026 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG: slightly refactor DAGCombiner::visitSELECT_CC to avoid redudant checks...

This doesn't really effect performance due to all the relevant calls being transparent but is clearer. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184027 91177308-0d34-0410-b5e6-96231b3b80d8
MI-Sched: DEBUG: print critical resource.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184028 91177308-0d34-0410-b5e6-96231b3b80d8
MI-Sched: added tracking of dependent latency for better heuristics.

Heuristics compare the critical path in the scheduled code, called
ExpectedLatency, with the latency of instructions remaining to be
scheduled. There are two ways to look at remaining latency:

(1) Dependent latency includes the latency between unscheduled and
scheduled instructions.

(2) Independent latency is simply the height (bottom-up) or depth
(top-down) of instructions currently in the ready Q.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184029 91177308-0d34-0410-b5e6-96231b3b80d8
MI-Sched: Remove the temporary EnableCopyConstrain flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184030 91177308-0d34-0410-b5e6-96231b3b80d8
MI-Sched: Rename IssueCount to CurrMOps.

"Counts" refer to scaled resource counts within a region. CurrMOps is
simply the number of micro-ops to be issue in the current cycle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184031 91177308-0d34-0410-b5e6-96231b3b80d8
Machine Model: Add MicroOpBufferSize and resource BufferSize.

Replace the ill-defined MinLatency and ILPWindow properties with
with straightforward buffer sizes:
MCSchedMode::MicroOpBufferSize
MCProcResourceDesc::BufferSize

These can be used to more precisely model instruction execution if desired.

Disabled some misched tests temporarily. They'll be reenabled in a few commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184032 91177308-0d34-0410-b5e6-96231b3b80d8
Update machine models. Specify buffer sizes for OOO processors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184033 91177308-0d34-0410-b5e6-96231b3b80d8
Support BufferSize on ProcResGroup for unified MOp schedulers.

And add Sandybridge/Haswell resource buffers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184034 91177308-0d34-0410-b5e6-96231b3b80d8
MI-Sched: heuristics using the new latency and machine model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184038 91177308-0d34-0410-b5e6-96231b3b80d8
Missing NDEBUGs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184039 91177308-0d34-0410-b5e6-96231b3b80d8