further progress.. the end is neeeaaaarrrrr...
Merge branch 'master' of ssh://59.181.118.66/home/repo/ahir

Conflicts:
	v2/Ahir-asm/devel/src/AaStatement.cpp
get in synch.
On the road again..  Real soon now, to loop-pipelining heaven..
some more small steps to the holy land of loop pipelining..
first cut implementation of loop pipelining is nearly done.
All that remains is the forcing of all joins in the pipelined
loop body to have places with capacities.  And of course some
serious testing!
closer to the end.
Compiles, runs, now testing to fix bugs..
OK. the basic loop pipelining seems to be working.
Now for some elimination of redundant cycles, and
also more testing with array accesses etc.
tested some cases.  memory accesses are next.
loop-pipelining from Aa to VHDL implemented!
Performance gains are as expected.
Some loose ends in the Aa -> VHDL loop pipelining.  It
seems to be functional and works.

Next steps:
1. llvm2aa should recognize and dump do-while
   loops.
2. AaOpt needs an optimization to balance
   paths in do-while loops.
3. Need to introduce a concept of write_synch_uint32
   etc. in order to differentiate between synchronization
   reads/writes to/from pipes and data read/writes to/from
   pipes.
default loop-pipelining max-iterations in flight reduced to 256
(8 bit counters in places are cheap, and the pipelining performance
does not seem to be too sensitive to the max-iterations in flight).

Also added a -I <int> option to vc2vhdl to change this
setting.
loop pipelining tests: bugs found, being fixed.
performance good..
Last step: balancing the paths in a do-while loop body
in order to improve pipelining performance.
Balancing done..  Looop pipelining more or less
completed.  Getting 5X improvement in performance
over vanilla matrix-multiplication.
Loop Pipelining works fabulously.  The inner loop
of the matrix multiplication algorithm is speeded
up by 6X for 4x4 matrices.
Handling of call statements in path equalization..
Needed to preserve the synchronization property of
pipe accesses while doing loop-pipelining.
Implemented and checked out on some small examples.
Some more tinkering around..  loop pipelining
investigations.