Wait for DesignWare UART transfers completion before accessing line control

When using DW UART with BUSY detection it is necessary to wait
until all serial transfers are finished before manipulating the
line control. LCR will not be affected when UART is busy.
In addition, if Divisor Latch Access Bit is being set in order to
modify UART divisors:
1. We will get BUSY interrupt if interrupts are enabled.
2. Because LCR will not be affected the THR and (even worse) IER
   contents will be corrupted. This will lead to console hang.

Approved by:	cognet (mentor)
Enable UART busy detection handling for Armada XP - based board

All Armada XP chips should be affected. It is necessary to handle
busy interrupt/indication by enabling busy-detect property in DTS.

Tested by:	kevlo
Approved by:	cognet (mentor)
Enable SATA interface on Armada XP

- Add appropriate entry to DTS
- Allow for MV78460 SATA probe and configuration

Tested by:	kevlo
Approved by:	cognet (mentor)
Move includes from if_bcereg.h to .c files.
Remove unsigned < 0 comparison.
Clean up missed header references.