Integration with the xilinx tools

HardwareProject.cpp
 For some reason copy a file to its own directory would cause a bug
where the file will contain nothing. Adding a hack to fix this bug

XilinxProjectHandler.cpp XilinxProjectHandler.h
 Adding implementation to enable the compilation of the architectures
with the xflow tool.
Fixing a generation bug in the component generation
Fixing generation bugs

HardwareComponent.cpp
 Was not giving types to the generated signals when connecting some
types of ports

HardwareComponentConverterVHDL.cpp
 Was not defining the "component <componentName>" keyword neither
closing the component keyword correctly
 Was generating not standard libraries
 Was using "->" instead of "=>" for port maps
Fixing generation bugs

CommunicationHardware/CommunicationHardwareConverterVHDL.cpp
 Was not generating the correct names for the inputs/outputs of the CommunicationHardware

CommunicationHardware/CommunicationHardwareXmlParser.cpp
 commHardware_mode input was missing

HardwareProject.cpp
 Was generating the CommunicationHardware project with the wrong name
Debug script to easy the process of running with gdb
Fixing generation

CommunicationHardware/CommunicationHardwareConverterVHDL.cpp
 Was generating write process even when the sw interface was from the
output type
Fixing a bug in the component name generation
Spliting compilation in two stages for xilinx toolflow

Fist generation of ngc files
  - This step uses the compilationScript.tcl
Second generation of bitstreams
Adding new logic to set the bitsream location in the ReconfModules
Adding method to enable the storing of the bitstream locations
Adding new logic to compile the design and generate the partial
bitstreams