IT RUNS!

Got the PASM code running but have to deal with some timing problem: At
80 cycles, the hub access and trace cogs apparently pick up the address
bus too late or too early, seeing FDF0 instead of FFF0. At 88 cycles it
works fine. At values in between, the loop runs out of time (hangs) so
the code needs to be slightly more complicated that just taking 80 as
minimum and allowing all values that are greater.
At 88 cycles or higher, this works! Using this configuration, the test
program tests the control cog, the hub access cog and the trace cog. It
also tests that the 6502 accesses the RAM chip in read and write mode
correctly.
The timing problem can probably be fixed by using a cog timer instead of
bitbanging CLK0.
The download code and the RAM cog code also still need to be tested. I
haven't reviewed the download code for a while so it may need to be
rewritten.