removed unneeded busy waiting for bus BUSY to clear before mastering it

removed unneeded I2C reset just after resetting peripheral
removed unneeded busy wait mastering bus in transmit case
Improved clock setup err messages.  Catch case where i2cclk>400hkz.

STM32_I2C_LOOSE_CLK can be #defined to allow cases where clock divisors are not exact
Don't program DMA channels until after we're mastering the bus

so as not to interfere with slave mode DMA
Take advantage of fact that max DMA transfer is 64Kbytes