Replaced non-ASCII character.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193324 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: Use non-VFP softcalls on embedded Darwinish targets

The compiler-rt functions __adddf3vfp and so on exist purely to allow Thumb1
code to make use of VFP instructions by switching back to ARM mode, they make
no sense for M-class processors which don't even have an ARM mode.

Given that justification, in practice this is a platform ABI decision so the
actual check is based on that rather than CPU features.

rdar://problem/15302004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193327 91177308-0d34-0410-b5e6-96231b3b80d8
Added tests for microMIPS relocations 1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193332 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: mark various aliases with their architecture requirements.

If an alias inherits directly from InstAlias then it doesn't get any default
"Requires" values, so llvm-mc will allow it even on architectures that don't
support the underlying instruction.

This tidies up the obvious VFP and NEON cases I found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193340 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: add a couple more NEON predicates.

The fused multiply instructions were added in VFPv4 but are still NEON
instructions, in particular they shouldn't be available on a Cortex-M4 not
matter how floaty it is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193342 91177308-0d34-0410-b5e6-96231b3b80d8
Added std::string as a built-in type for mapping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193344 91177308-0d34-0410-b5e6-96231b3b80d8
Mark vector loops as already vectorized

Make sure we mark all loops (scalar and vector) when vectorizing,
so that we don't try to vectorize them anymore. Also, set unroll
to 1, since this is what we check for on early exit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193349 91177308-0d34-0410-b5e6-96231b3b80d8
Reverting my r193344 checkin due to build breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193350 91177308-0d34-0410-b5e6-96231b3b80d8
Fix broken builds by moving test to x86 dir

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193351 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: Mark double-precision instructions as such

This prevents us from silently accepting invalid instructions on (for example)
Cortex-M4 with just single-precision VFP support.

No tests for the extra Pat Requires because they're essentially assertions: the
affected code should have been lowered to libcalls before ISel.

rdar://problem/15302004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193354 91177308-0d34-0410-b5e6-96231b3b80d8