Using a different loop induction variable than the enclosing scope.  No functional changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187159 91177308-0d34-0410-b5e6-96231b3b80d8
Phabricator.rst: tiny fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187164 91177308-0d34-0410-b5e6-96231b3b80d8
Add a bool->StringRef c'tor to StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187166 91177308-0d34-0410-b5e6-96231b3b80d8
[PowerPC] Support powerpc64le as a syntax-checking target.

This patch provides basic support for powerpc64le as an LLVM target.
However, use of this target will not actually generate little-endian
code.  Instead, use of the target will cause the correct little-endian
built-in defines to be generated, so that code that tests for
__LITTLE_ENDIAN__, for example, will be correctly parsed for
syntax-only testing.  Code generation will otherwise be the same as
powerpc64 (big-endian), for now.

The patch leaves open the possibility of creating a little-endian
PowerPC64 back end, but there is no immediate intent to create such a
thing.

The LLVM portions of this patch simply add ppc64le coverage everywhere
that ppc64 coverage currently exists.  There is nothing of any import
worth testing until such time as little-endian code generation is
implemented.  In the corresponding Clang patch, there is a new test
case variant to ensure that correct built-in defines for little-endian
code are generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187179 91177308-0d34-0410-b5e6-96231b3b80d8
Take advantage of the register enums being in order to remove a couple static tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187182 91177308-0d34-0410-b5e6-96231b3b80d8
Make .bc en/decoding of AttrKind stable

The bitcode representation attribute kinds are encoded into / decoded from
should be independent of the current set of LLVM attributes and their position
in the AttrKind enum. This patch explicitly encodes attributes to fixed bitcode
values.

With this patch applied, LLVM does not silently misread attributes written by
LLVM 3.3. We also enhance the decoding slightly such that an error message is
printed if an unknown AttrKind encoding was dected.

Bonus: Dropping bitcode attributes from AttrKind is now easy, as old AttrKinds
       do not need to be kept to support the Bitcode reader.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187186 91177308-0d34-0410-b5e6-96231b3b80d8
Fix more Intel syntax issues with FP instruction aliases. Test cases coming in a subsequent patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187187 91177308-0d34-0410-b5e6-96231b3b80d8
Add test cases for the various instruction alias and Intel syntax fixes that have gone in lately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187188 91177308-0d34-0410-b5e6-96231b3b80d8
Re-implement the analysis of uses in mem2reg to be significantly more
robust. It now uses an InstVisitor and worklist to actually walk the
uses of the Alloca transitively and detect the pattern which we can
directly promote: loads & stores of the whole alloca and instructions we
can completely ignore.

Also, with this new implementation teach both the predicate for testing
whether we can promote and the promotion engine itself to use the same
code so we no longer have strange divergence between the two code paths.

I've added some silly test cases to demonstrate that we can handle
slightly more degenerate code patterns now. See the below for why this
is even interesting.

Performance impact: roughly 1% regression in the performance of SROA or
ScalarRepl on a large C++-ish test case where most of the allocas are
basically ready for promotion. The reason is because of silly redundant
work that I've left FIXMEs for and which I'll address in the next
commit. I wanted to separate this commit as it changes the behavior.
Once the redundant work in removing the dead uses of the alloca is
fixed, this code appears to be faster than the old version. =]

So why is this useful? Because the previous requirement for promotion
required a *specific* visit pattern of the uses of the alloca to verify:
we *had* to look for no more than 1 intervening use. The end goal is to
have SROA automatically detect when an alloca is already promotable and
directly hand it to the mem2reg machinery rather than trying to
partition and rewrite it. This is a 25% or more performance improvement
for SROA, and a significant chunk of the delta between it and
ScalarRepl. To get there, we need to make mem2reg actually capable of
promoting allocas which *look* promotable to SROA without have SROA do
tons of work to massage the code into just the right form.

This is actually the tip of the iceberg. There are tremendous potential
savings we can realize here by de-duplicating work between mem2reg and
SROA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187191 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Add TODO regarding byval structs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187193 91177308-0d34-0410-b5e6-96231b3b80d8
test commit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187195 91177308-0d34-0410-b5e6-96231b3b80d8
Add a target legalize hook for SplitVectorOperand

CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.

This also adds a test case for NVPTX that depends on this custom
legalization.

Differential Revision: http://llvm-reviews.chandlerc.com/D1195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187198 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "Add a target legalize hook for SplitVectorOperand"

This reverts commit 187198. It broke the bots.

The soft float test probably needs a -triple because of name differences.
On the hard float test I am getting a "roundss $1, %xmm0, %xmm0", instead of
"vroundss $1, %xmm0, %xmm0, %xmm0".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187201 91177308-0d34-0410-b5e6-96231b3b80d8
Add a target legalize hook for SplitVectorOperand (again)

CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.

This also adds a test case for NVPTX that depends on this custom
legalization.

Differential Revision: http://llvm-reviews.chandlerc.com/D1195

Attempt to fix the buildbots by making the X86 test I just added platform independent

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187202 91177308-0d34-0410-b5e6-96231b3b80d8
Next batch of -disable-debug-info-verifier.

These tests fail without it if pipefail is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187205 91177308-0d34-0410-b5e6-96231b3b80d8
Improve our error handling on windows.

* Remove LLVM_ENABLE_CRT_REPORT. LLVM_DISABLE_CRASH_REPORT made it redundant.
* set Return to 1, so that we get a stack trace on failure.
* don't call _exit, so that we get a negative exit value and "not --crash"
  correctly differentiates crashes and regular errors.

This is a bit experimental since the documentation on this interface is sparse.
It doesn't bring up a dialog on my windows setup, but feel free to revert
if it causes problem for your setup (and let me know what it is so that I
can try to fix this patch).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187206 91177308-0d34-0410-b5e6-96231b3b80d8
Extend the lifetime of the strings passed to posix_spawn_file_actions_addopen.

Thanks to Hal Finkel for finding the bug and for the initial patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187208 91177308-0d34-0410-b5e6-96231b3b80d8
Remove dead or useless header checks from cmake and autoconf

On Windows, this improves clean cmake configuration time on my
workstation from 1m58s to 1m32s, which is pretty significant.  There's
probably more that can be done here, but this is the low hanging fruit.

Eric volunteered to regenerate ./configure for me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187209 91177308-0d34-0410-b5e6-96231b3b80d8
Add a way to get the context of any particular scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187212 91177308-0d34-0410-b5e6-96231b3b80d8
Add preliminary support for hashing DIEs and breaking them into
type units.

Initially this support is used in the computation of an ODR checker
for C++. For now we're attaching it to the DIE, but in the future
it will be attached to the type unit.

This also starts breaking out types into the separation for type
units, but without actually splitting the DIEs.

In preparation for hashing the DIEs this adds a DIEString type
that contains a StringRef with the string contained at the label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187213 91177308-0d34-0410-b5e6-96231b3b80d8