drivers/net/designware - respect "bus mode" register contents on SW reset

"bus mode" register contains lots of fields and some of them don't
expect to be written with 0 (zero). So since we're only interested in
resetting MAC (which is done with setting the least significant bit of
this register with "0") I believe it's better to modify only 1 bit of
the register.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
drivers/net/designware - fix alignment of buffer descriptors

It's important that buffer descriptors are aligned in accordance to GMAC
data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
for every bus width type.

If buffer descriptor is improperly aligned GMAC discards lower bits of
provided address and as a result reads from improper location that
doesn't match expected fields.

Commit ef76025a99247cdb8f927a2c9f15400678dfb599 "net: Multiple
updates/enhancements to designware.c" introduced another structure
member "link_printed" right before buffer descriptors while "padding"
member was left untouched. This together with alignment of structure
itself to 16-byte boundary forces buffer descriptoprs always to be
4-byte aligned that causes driver complete disfunction if GMAC bus width
is 64 or 128-bit.

Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
aligned.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Compared to V1 "dw_eth_dev" structure was left aligned, because I
realized that it's address will be used as a base for all the members.
And only this way I may be sure arrays of buffer descriptors are
properly aligned.
ARC: [Xplorer] - update configuration for rev.2 boards

 * CPU frequency switched form 400 MHz to 600 MHz
 * Default UART is now #4 (with built-in TTY/USB converter)

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
ARC: [Xplorer] - remove useless "designware_board_phy_init" function

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>