sf: Remove bank access unify logic code

Removed spi_flash_bank() unify logic code, and place into
to a respective flash ops routines. So-that it makes some
more clearity on the code logic in early support.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
sf: Fix dual stacked mode upper qspi read

For reading upper qspi in dual stacked mode, the remain_len logic
should have a bank_sel based on the total size of the flash, not
with half of total size.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwards

CAP register don't have any information for 8-bit buswidth support
on 2.0 sdhci spec, only from 3.0 onwards bit[18] got this information.

Due to this misassignment in sdhci, mmc is setting 8-bit buswidth using
mmc_set_bus_width even if controller doesn't support.
Below change has code information.
"mmc: Properly determine maximum supported bus width"
(sha1: 7798f6dbd5e1a3030ed81a81da5dfb57c3307cac)

Bug log: <mmc plus and emmc cards)
-------
zynq-uboot> mmcinfo
Error detected in status(0x208100)!
Device: zynq_sdhci
Manufacturer ID: fe
.....

So enable 8-bit support only for 3.0 spec using CAP and for below 3.0
assign mmc->host_caps = MMC_MODE_8BIT on respective platform driver
if host have a support.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>