KVM: ARM: Move vgic register access to C-code

This makes the code more readable and paves the way for cross-cpu
virtual interrupt injection and some more lazy save/restore of
registers.

We could take the mapping of Hyp mode vgic control register access out
at this point, but we may want to do some shortcutting of the sender
side of IPIs at some point, so leave the code in for now.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
ARM: EXYNOS5250: Add CPU-specific vGIC control regs addr

We can use the CPU-specific interface to the virtual control registers
instead of the common base address to let other CPUs directly inject
interrupts to cores without causing world-switchs.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
KVM: ARM: vgic: Map CPU-specific VCTRL interface

Having the cpu-specific interface available allows us to do
cross-physical-core interrupt injection without as many world-switches.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
KVM: ARM: vgic: Take distributor lock on hwsync

The contention is likely to be quite low here and the tradeoff is that
we can access list registers from other physical cores which has a much
higher chance of giving us a performance boost.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
KVM: ARM: vgic: Keep track of the physical ID using the vgic

Add a cpuid field to the vgic_cpu structure so that we know which vgic
instance (tied to a specific vcpu instance) is currently running on a
physical CPU, and which physical CPU it's running on.

This gives us the possibility of signaling such a physical CPU directly
if it has any free list registers without having to do a hardware IPI
and have the guest CPU take a round-trip to the host to program a single
list register.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
KVM: ARM: vgic: Use accessors for IRQ to LR mapping

Instead of manually manipulating the IRQ to LR mapping, use an accessor
function to abstract away the implementation and make it easier to add a
reverse mapping.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
KVM: ARM: vgic: Add LR to IRQ map

We already have a map from an IRQ to the LR used for that IRQ, but not
the other way around.  Not having such a map ties the virtual GIC
implementation handling to hardware state that can be otherwise used for
optimizations, such as direct interrupt injection.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
KVM: ARM: vgic: IPI-less virtual IPI support

Directly inject IPIs from one virtual core to another virtual core each
running on a separate physical core without taking a world-switch on the
receiving core or waiting to send a real hardware IPI on the sending
core, if there are available list registers, which appears to be around
80% of the time on an IPI intensive workload such as hackbench or
Apache.

Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>