CM3: ddr: Cleanup DDR handling code for LPDDR2

Use conditionals to allows firmware to perform correct IO config for
DDR2, DDR3, or LPDDR2
TEMP: LPDDR2 Resume IO_CONFIG must be skipped

If the the expected IO_CONFIG is set for LPDDR2 during a resume no
data can be accessed from DDR when control is return to kernel. For now,
just return as this works fine.
CM3: Clean-up ds_save and ds_restore for both 335x and 43xx

Fix up ds_save and ds_restore functions to work properly for either
335x or 43xx and also different types of memory
CM3: Re-enable pll power down for DS0

Now that PLLs are properly defined, re-enable power down and
power up of select plls during DS0 sequence
CM3: Disable i2c sequences for AM43XX until properly validated
CM3: Update M3 version and commit new binaries

Update to version 0x186 to reflect new AM43XX changes