From Liviu Valsam:
I'm working in the CERN openlab team and I've recently managed to get
ROOT cross-compiled on an Intel Xeon server system for the Intel Xeon Phi
coprocessor, more specifically the Knights Corner card using Intel's Many
Integrated Cores architecture.

I will also quickly describe my changes:
- Currently the officially supported compiler for getting software compiled
  for the Xeon Phi is ICC, so I have included support only for ICC, for now.
  In case there will be good MIC support in mainstream gcc in the future I
  could then add a profile for it as well. I have tested my cross-compilation
  changes using Intel Composer XE 2013 Update 1 (version 13.0.1.117,
  build 20121010).
- The Knights Corner architecture is internally known as k1om so I've defined
  a new architecture with the name linuxx8664k1omicc, using linuxx8664icc
  as a base and adding the MIC specific bits.
- The platform I've defined as "linux-k1om".
- Inside the config/Makefile.linuxx8664k1omicc file I've added a MICFLAGS 
  variable containing the MIC specific compilation flag (that's used in
  other places as well).
- In the configure script I've added a section for linuxx8664k1om*, disabling
  those pieces that can't be cross-compiled (as in the case of iOS).

The configure step I've performed using the following command: 
"./configure linuxx8664k1omicc --enable-roofit --enable-minuit2
 --with-thread-libdir=/usr/linux-k1om-4.7/linux-k1om/usr/lib64/
 --enable-builtin-zlib". /usr/linux-k1om-4.7/linux-k1om/usr/lib64/
contains the MIC specific libraries (including libpthread*) distributed
together with the MIC software stack. By not using the --with-thread-libdir
flag pointing to the proper MIC pthread lib location makes the compilation
fail with the following error:
 #error "No Thread Local Storage (TLS) technology for this platform specified."


git-svn-id: https://root.cern.ch/svn/root/branches/v5-34-00-patches@48846 27541ba8-7e3a-0410-8455-c3a389f83636