vmxnet: Don't use bswap_64 for constants

This macro is used in the context of defining enum values.
We can't use a function call in that case.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Fix movi

The code to load the high 64 bits assumed that the insn used to
load the low 64 bits zero-extended.  Enforce that.
tcg-s390: Properly allocate a stack frame.

Set TCG_TARGET_CALL_STACK_OFFSET properly for the abi.  Allocate the
standard TCG_STATIC_CALL_ARGS_SIZE.  And while we're at it, allocate
space for CPU_TEMP_BUF_NLONGS.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Remove useless preprocessor conditions

We only support 64-bit code generation for s390x.
Don't clutter the code with ifdefs that suggest otherwise.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Implement add2/sub2 opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Implement mulu2_i64 opcode

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Implement movcond opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Implement deposit opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Remove constraint letters for and

Since we have a free temporary and can always just load the constant, we
ought to do so, rather than spending the same effort constraining the const.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Use risbgz for andi

This is immediately usable by the tlb lookup code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Cleanup argument shuffling fixme in softmmu code

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Use load-address for addition

Since we're always in 64-bit mode, load address performs a full
64-bit add.  Use that for 3-address addition, as well as for
larger constant addends when we lack extended-immediates facility.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-s390: Use all 20 bits of the offset in tcg_out_mem

This can save one insn, if the constant has any bits in 32-63 set,
but no bits in 21-31 set.  It never results in more insns.

Signed-off-by: Richard Henderson <rth@twiddle.net>