tcg-ppc64: Streamline tcg_out_tlb_read

Less conditional compilation.  Merge an add insn with the indexed
memory load insn.  Load the tlb addend earlier.  Avoid the address
update memory form.

Fix a bug in not allowing large enough tlb offsets for some guests.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Add _noaddr functions for emitting forward branches

... rather than open-coding this stuff through the file.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Implement CONFIG_QEMU_LDST_OPTIMIZATION

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Set ext based on TCG_OPF_64BIT

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Change all ext variables to bool

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Don't handle mov/movi in tcg_out_op

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Hoist common argument loads in tcg_out_op

This reduces the code size of the function significantly.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Change enum aarch64_arith_opc to AArch64Insn

And since we're no longer talking about opcodes, change the
values to be shifted into the opcode field, avoiding a shift
at runtime.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Merge enum aarch64_srr_opc with AArch64Insn

And since we're no longer talking about opcodes, merge the 0x1ac02000
data2 primary opcode with the shift subcode to create the full insn.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Introduce tcg_fmt_* functions

Now that we've converted opcode fields to pre-shifted insns, we
can merge the implementation of arithmetic and shift insns.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Introduce tcg_fmt_Rdn_aimm

This merges the implementation of tcg_out_addi and tcg_out_subi.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Implement mov with tcg_fmt_* functions

Avoid the magic numbers in the current implementation.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Handle constant operands to add, sub, and compare

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Handle constant operands to and, or, xor

Handle a simplified set of logical immediates for the moment.

The way gcc and binutils do it, with 52k worth of tables, and
a binary search depth of log2(5334) = 13, seems slow for the
most common cases.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support andc, orc, eqv, not

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Handle zero as first argument to sub

In order to properly handle neg, as generated by TCG generic code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support movcond

Also tidy the implementation of setcond in order to share code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support deposit

Also tidy the implementation of ubfm, sbfm, extr in order to share code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support add2, sub2

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support muluh, mulsh

Signed-off-by: Richard Henderson <rth@twiddle.net>