Internals: Make propagateAttrClocksFrom. No functional change.
Tests
Commentary
Internals: Track original signal name. No functional change.
Internals: Functions in order. No functional change.
Internals: New Hashed/Graph functions towards msg980.

Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
Add duplicate clock gate optimization, msg980.
Experimental and disabled unless -OD or -O3 used (for now),
Please try it as may get some significant speedups.

Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
Internals: GateDedupe: Use visitor per msg980.

Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
Merge branch 'master' into verilog-short-circuit