ADD LCD to the DRT JSON config file
BUG: In wishbone testbench template
BUG FIX: Debugged the ppfifo 2 mem controller
SMALL CHANGE: changed sycamore to Nysa
CHANGE: Logic Analyzer Buffer depth is parameter
BUG FIX: fixed constraint file reader in ibuilder
CHANGE: Use utils to read the constraint file
BUG FIX: Fixed a debug message
debugging Sparkfun Camera
Changed the constraint file
Added configuration file to debug internal camera signals
Added a Sparkfun Camera core
FIX Whitespace
Added a constraint file for the Sparkfun Camera
Added a simulated camera interface
FIXED: I2C example configuration file

The new system requires explicit binding of the clock and reset singals
Initial commit of the New Haven LCD Controller
REFACTOR: Change host.py to nysa.py

The user will be instantiating Nysa when using the API so it's good to
just call the file that
LCD is displaying static images!

Some small fixes
BUG FIX: Small bug when a port name has 'reg'

For the rare case that the name of a port has 'reg' like
'register_control_data' before verilog_utils would return
'ister_control_data' as the actual port