MFC r253406:
  Avoid magic constant.
  No functional change.
MFC r253408:
  Implement workaround for BCM5719/BCM5720 TX hang.
  The read DMA request logic operation is based on having sufficient
  available space in the transmit data buffer (TXMBUF) before a read
  DMA can be requested.  There are four read DMA channels that use
  the TXMBUF, and the logic checks if the available free space in the
  TXMBUF is large enough for all the data in the four Send Buffers
  for which buffer descriptors have been fetched.  The Enable_Request
  signal is asserted only if the free TXMBUF space is larger than the
  sum of the four DMA length registers.  The power-up default value
  of BGE_RDMA_LSO_CRPTEN_CTRL register bit 25 (bit 21 on BCM5720) is
  zero, which selects the DMA length registers to connect to the
  input of the adder block.  The DMA length registers are
  asynchronously reset following BCM5719/BCM5720 power-up, and due to
  the lack of synchronous deassertion of the length registers reset
  signal these resisters may contain uninitialized values following
  the reset deassertion.
  In the case of the failure the uninitialized DMA length register
  values added up to more than the TXMBUF size, which prevented the
  assertion of the Enable_Request signal and any subsequent read DMA
  to start.  This lockup condition is the root cause of failing to
  generate any transmit traffic.

  To workaround the issue, select alternate output of multiplexers
  and transmit the first four Ethernet frames. This overwrites the
  DMA length registers with valid values.
MFC r253480:
  Setup the PCIE Fast Training Sequence (FTS) value to prevent
  transmit hangs for 57766 and non Ax versions of 57765.
  While here, correct definition of BGE_CHIPREV_57765_AX.
MFC r253481:
  Recognize BCM5725C PHY.
MFC r253483:
  Add support for upcoming BCM5725 (ASIC 5762) controller.  This is a
  new 1Gb server controller chip that will be going into production
  soon.
  BCM5725 combines MAC with triple-speed PHY, a Network Controller
  Sideband Interface (NC-SI) and on-chip memory buffer in a single
  device.  BCM5725 has an Application Processing Engine (APE) that is
  capable of on-chip management and offloading features.  BCM5725
  supports high-precision clock, time stamp registers for
  receive/transmit packets and programmable trigger inputs and
  watchdog timeouts. These new features are not yet supported by
  bge(4).
  Many thanks to Broadcom for continuing to support FreeBSD!
MFC r253540:
  5725 family of devices corrupts TSO packets when TSO DMA buffers
  cross into regions which are within MSS bytes of a 4GB boundary.
  If we encounter the condition, drop the packet.
MFC r258830:
  Add support for BCM57764, BCM57767, BCM57782, BCM57786 and BCM57787.
  PR:	184304
[automated] Merge in upstream-github/stable/9