+ added Quartus project (if you want to simulate, you HAVE to open the .qpf file in a folder and a path containing no spaces!!) *** Warning +/- 15MB.
+ added my electric libraries, have to open mips8_lct and extract :
      --> HalfAdder
      --> NAND8_reducer
      --> PPGen_1bit
      --> PPGen_9bits
      --> PPGen_wordslice
+ verilog deck is ready to simulate in ModelSim, no DRC so far...