Catch cases where there are no sw_registers / snapshots / info blocks in design
Merge branch 'master' of https://github.com/ska-sa/mlib_devel
Merge branch 'master' of https://github.com/ska-sa/mlib_devel

Conflicts:
	xps_library/gen_xps_add_design_info.m
Added pcores and xps_library files for x64_adc on ROACH 1

You'll need the usual deprecated Xilinx pcores and dcm_module_v1_00_d to use this adc block
Added pcores for adc2x14_400 (including 4x demux version) to ROACH 2 base package. Courtesy Guy Kenfack
Removed .DS_Store directory from earlier adc2x14_400 commit
doubles2unsigned modification

doubles2unsigned changed to take the maximum word size. It concatenates
the input columns and then divides the resultant vector so that it
will fit into words of the specified size.

Updates to init scripts that use it.
tostring removal from flatstrcell

slowly removing tostring, not actually needed.
bus_dual_port_ram added to bus

Allows a bus to be spread across multiple BRAMs and allows
the fanout of address, enable, write enable etc to be controlled.

Needed for pfb_fir coefficient storage and delays where large
busses are being stored in BRAMs with non-trivial address, write enable
etc logic.

Gives the same interface as a Xilinx dual port ram block. Parameters
are the same except that depth is inferred from the length of the
initialisation vector and bit width and binary point of the input
vectors must be specified.
Merge branch 'master' of https://github.com/jack-h/mlib_devel