base code from marvell

Signed-off-by: npc <npc@npc-Desktop.(none)>
ARM: pxa: redefine the cpu_is_pxa3xx

PXA300/PXA310/PXA320/PXA930/PXA935 are sharing one cpu family id.
It's a little confusion on cpu_is_pxa3xx().

Now reduce the scope of cpu_is_pxa3xx(). Make it focusing on
PXA300/PXA310/PXA320. PXA930/PXA935 is coverd by cpu_is_pxa93x().

Change-Id: Ie1f1b50c4d91e555ec96f2422aba1d2646ab02e5
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
ARM: pxa: redefine irqs.h

A lot of componets of PXA93x are shared with PXA3xx. From CPUID, they belong
to same family. But it's confustion that code of PXA93x is depend on PXA3xx
by default.

Now clean the scope of both PXA3xx and PXA93X. Only PXA300/PXA310/PXA320 is
family member of PXA3xx. Only PXA930/PXA935 is family member of PXA93x. Remove
the code dependany on IRQ definition.

Change-Id: I481ef1ac0eb9773e0dbcf247a757302ad6d905d5
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
ARM: pxa: split pxa93x from pxa3xx

In order to avoid confusion, seperate pxa93x from pxa3xx.

Change-Id: Iab5bd2ee8d2d480a4b54996d5b373c59a48f4310
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
ARM: pxa: update to read ICHP

ICHP records the highest priority interrupt occured. In PXA27x/PXA3xx, we
can read ICHP via cooprocessor. In PJ4, we can only read ICHP via bus
register. So use the same method to read ICHP via bus register.

Change-Id: Ib3ef9489737ee6e1f5d0fdd66c08fd50e3b6328b
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
ARM: pxa: support pxa95x

The core of PXA955 is PJ4. Add new PJ4 support. And add new macro
CONFIG_PXA95x.

Change-Id: I3dd6a6a37b5926d5353b79a2451b5817c06b8185
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
ARM: pxa: support saarb

Add saarb mg1(pxa955) support.

Change-Id: Icdad3bab2908f680c97a4bf1361dc3254a264e9c
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
ARM: pxa: add board id of saarb mg1

Hack the saarb mg1 board id.

Change-Id: Ieb1b4bd30f20ab1825e1d4f412129b58deb3416d
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
pxa3: fix kernel decompress slow issue

Issue:
When the zImage is larger than 2M bytes,  the kernel self-decompress is
very slow.

Root cause:
The arch/arm/boot/compressed/head.S will map the 2M bytes of region around the
zImage location as cachable to speed up the zImage self-decompress. But when zImage
becomes larger than 2M bytes, the decompress will have to use some uncachable DDR
area which leads to decompress slow down suddenly.

Fix:
Let arch/arm/boot/compressed/head.S map 4M bytes of region around the zImage location as
cachable.

Change-Id: Ib32ee665b6522529d850cdb92472cfa33636f2ac
Signed-off-by: Jack Ren <jack.ren@marvell.com>
ARM: pxa: append pxa955_defconfig

Change-Id: I069dc624166af2ba056195d2bb7bc1b17f9975e6
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
ARM: pxa: set default UART of jasper and brownstone

The default UART of jasper and browstone is UART3, not UART2.

Change-Id: I4c96fc14c237ea48210e49669ae4daa4005087c0
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
ARM: mmp: add brownstone support

Change-Id: If54b0e64a23d1b5cbbbf981fca41d2a8cc9d3fd2
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
ARM: mmp: update cpuid of pxa168 and pxa910

Correct the cpuid of pxa168 and pxa910.

Change-Id: Ib4b4882b6a40c25e813c74f807a8a40fe8cb3661
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
mtd: pxa3xx: fix build error when CONFIG_MTD_PARTITIONS is not defined

Change-Id: Ib617d940618f5f77fd352cba3f8aa04614789c74
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
mtd: pxa3xx_nand: condense the flash definition

Adding a new flash definition would need less code.
Keep the platform passing flash definition method.
If one flash is both defined in platform data and builtin table,
driver would select the one from platform data first.

By this way, platform could select the timing most suit for itself,
not need to follow the common settings.

Change-Id: I6bb86d3abd27a8a0c3a0933bbfbdb1b37ee34fbb
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
mtd: pxa3xx_nand: introduce default timing to reduce read id times

We certainly don't need to send read id command times by times, since
we already know what the id is after the first read id...

So create a default timing which could ensure it would successfully read
id out all supported chip. Then follow the build-in table to reconfigure
the timing.

Change-Id: I43c766cfb7f2fd137b8213d7716e7a8835066f65
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
mtd: pxa3xx_nand: remove the flash info in driver structure

After probe, all info already transfer to driver structure.
There is no need to keep the original flash info.
So that we could safely free the flash info in memory, which may grows
larger when more flash is suported.

Change-Id: I279778cffb69ba487dc19fa7bc247d350858b539
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
mtd: pxa3xx_nand: set oob length in the runtime

For different command need different oob requirement, set the proper
oob length by different cmd.

Change-Id: I6b9eda075f7cea6381ab24722162e4761c2a0300
Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
pxa3xx_nand: make scan procedure more clear

Change-Id: If8e998d3ebc88b66b0c7f55a8205932d99fb7f47
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
pxa3xx_nand: rework irq logic

Enable all irq when we start the nand controller, and
put all the transaction logic in the pxa3xx_nand_irq.

By doing this way, we could dramatically increase the
performance by avoid unnecessary delay.

Change-Id: I30f2047925d634b216ac0c60fabe3c1d043611d0
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>