Fixed PCIe enumeration issue on AXM3500 emulation

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
USB driver on PPC was broken. Fixed the DTS to have correct entries and updated USB driver to have exclude 55xx relevant code from PPC build
Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
added a new ehci halt function to which just halts the EHCI controller. This is to be called during startup since spinlocks are not initialized at that point.

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
added a new ehci halt function to which just halts the EHCI controller. This is to be called during startup since spinlocks are not initialized at that point.

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Checking in correct USB entries to ACP3421 DTS
Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Checking PCIe driver support for AXM3500
Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
powerpc/sysdev: Fixed PCIe enumeration issue on AXM3500 emulation

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
drivers/usb: USB driver/dts on PPC was broken.

Fixed the DTS to have correct entries and updated USB driver
to exclude 55xx relevant code from PPC build

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
drivers/usb: added a new ehci halt function

New halt function halts the EHCI controller.
This is to be called during startup since spinlocks are not
initialized at that point.

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
drivers/rapidio/lsi: squash a bunch rapidio stuff together

FIXME: this commit message need ammending!

Signed-off-by: ningligong <ning.li@lsi.com>
Signed-off-by: Michael Bringmann <michael.bringmann@lsi.com>
Signed-off-by: Paul Butler <paul.butler@windriver.com>
arch/arm/mach-axxia: Flush L3 Cache before DDR Retention Reset

Added a flush of the L3 cache before initiating a DDR retention
reset.

Signed-off-by: John Jacques <john.jacques@lsi.com>
Merge branch 'standard/lsi/base' into standard/preempt-rt/lsi/base
arch/arm/mach-axxia: DDR Retention MUST Work in Interrupt Context

ioremap() can't be used in interrupt context...

Signed-off-by: John Jacques <john.jacques@lsi.com>
Merge branch 'standard/lsi/base' into standard/preempt-rt/lsi/base
Merge branch 'standard/lsi/base' of github.com:lsigithub/lsi_axxia_yocto into standard/lsi/base
arch/arm/mach-axxia: DDR Retention Update

In some tests, a data synchronization barrier is needed
after turning the L3 cache back on (part of the L3 cache
flush process).  Without the barrier, resets sometimes fail.

Signed-off-by: John Jacques <john.jacques@lsi.com>
Merge branch 'standard/lsi/base' into standard/preempt-rt/lsi/base
Merge branch 'standard/lsi/base' of github.com:lsigithub/lsi_axxia_yocto into standard/lsi/base
Updated PCIe driver to set PCIe BASE_ADDR1 register to 0x0 without which PCIe inbound access wasn't working and we were seeing several suprious PEI interrupts including BAR mismatch interrupt. Also, added Intel GigE driver support to lsi_defconfig. This addresses BZ46012.
Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
LSI AXM55XX: Add PMU support

This patch adds PMU support to the Axxia AXM55xx platform. Note that
on this platform, all PMU IRQ lines are OR'ed together into a single
IRQ, and therefore, this implementation uses a rotating IRQ affinity
scheme to deal with it.

Signed-off-by: David Mercado <david.mercado@windriver.com>