[STM32L1:ADC] module refinement

This request include many refinements of ADC module of STM32L1.

Modifications
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* All modifications are based on STM32L1 specification file (see [Reference Manual] [manual]).
* Refine ADC header file definitions
    * Correct macros related to ADC_SQRx. There are 5 registers instead of 3. (commit: a13a59ae49f90d6ca8988cb58f13faabc74b941b)
    * Correct macros related to ADC_SMPRx.There are 28 channels instead of 22. (commit: 5a93528214de83e2a0bebc8cadd0ed31b69b6284)
    * Correct macros related to ADC_CR1_AWDCH. There are 0 to 26 channels. (commit: e56837688a34e4b867c0ef670130add745bc197f)
    * Correct macros related to ADC external trigger. (commit: d9393c1326d1b94d6b903cf5af4618df936bd1d2 and 8f288bc1957a4baa88679dcc2b6bd10797f81251)
    * Correct macros related to ADC_CCR, ADC_CSR, ADC_DATA. (commit: 1be57ebd3ac589b0047f0481e5b428fd6b0e506e, 039c542c6a159e11f5cfc097ca7e31e8c5e880e5 and c64638187b8f2549a50b0950151443d2ab08b894)
* Refine ADC source code file
    * Add some hardware status checking before software ADC trigger ensuring operation correctness. (commit: 47061bf216185a21bcc879ac82b4af1cbd4bbbec)
    * Add several APIs. The prototypes are defined in header file. (commit: bdbb0404bff775f1249aeb239d104d2682546995)
        * Enable / Disable over-run interrupt event. (commit: ee5577ef592c423bc7e55cd21655b169242d639f)
        * Enable / Disable EOC interrupt event. (commit: 5cc1e4c0c82cc0daeca4d4c5c9ed3a13fab3d94f)
        * Enable / Disable power down mode in idle phase. (commit: 1cc45d040bbfbe00a93ed814f322a5e1a7e2c9b8)
        * Enable / Disable power down mode in delay phase. (commit: 1cc45d040bbfbe00a93ed814f322a5e1a7e2c9b8)
        * Enable / Disable hardware to generate DMA requests circularly. (commit: 7d6ddc152144a83d1d23d1acb917436348a4cb4f)
        * Get / Clear flag of watchdog. (commit: ab8ec14ff1ecb8ca324cee8c549387632b5f2240)
        * Get / Clear flag of over-run. (commit: cba008c0221fa7a44ede5e60576db45d1a092ec3)
        * Clear flag of EOC and JEOC (commit: 5676c5458e7a61f9157f72be0eb3787e22218729)
        * Setup ADC resolution. (commit: 47dfe04c78413687afbfcde8b3cadbc9eae323e1)
    * Correct regular channel conversion. There are 28 channels in max, not 16. (commit: 3397c6a0e2db97f660ec446f5b3343c14c943d7f)
    * Correct ADC sample time setup. There are 28 channels in max, not 16. (commit: 277ad570697bcca385495af29bba2ebfde554dbb)
* Modify ADC examples with single shot conversion and DMA continuous scanning mode conversion. (commit: e00eee69d8e0de036722b271fd003d5245555296)

Note
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The two examples in `adc.c` are both tested on STM32L152RCT6 evaluation kit.

[manual]: http://www.st.com/web/en/resource/technical/document/reference_manual/CD00240193.pdf  "Manual"