Revert "Revert "DSS: Implement workaround for Errata ID:i733.""

This reverts commit 10e3d75694fe0f0d02a8067093da53a2fde27440.
Revert "enable CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS"

This reverts commit f92666375500eb970ba840865fb6fc89cd89a558.
Revert "ARM: 7746/1: mm: lazy cache flushing on non-mapped pages"

This reverts commit 2a54da48b2f6c3639e31c43fb8e8d75724745286.
ARM: assembler.h: use same WRITE_ALIGN_BYTES on omap4 as on armv6 platforms

Not all armv7 have 64 kbytes of l1 cache, for example the
Cortex-A9, which has 32 kbytes. As all omap4 platforms also
run Cortex-A9, adjust WRITE_ALIGN_BYTES accordingly.

Still needs testing.
fs/dcache.c: cache pressure = 65
mm.h: read_ahead_kb = 256
blkdev.h: default nr_requests = 256
 ARM: implement optimized percpu variable access