software/fpga/sdram: update comments
software/fpga: Extract SDRAM controller from FIFO

- Create a new SDRAM controller without builtin fifo logic. This SDRAM
controller implements a simple streaming master interface at the width
of the SDRAM that hides SDRAM quirks.

- Add testbench for SDRAM controller
software/fpga/sdram_mux:

- Add a roundrobin SDRAM arbiter + tests
software/fpga/sdram: Replaced SDRAM controller, added BIST

	- FPGA hardware now supports onboard BIST
	- Added support for SDRAM BIST to ovctl
		(report and sdramtest commands)