Summary:
components/Makefile: add package name ocpi.components
components/specs/capture_spec.xml: correct readability of properties
components/specs/pattern_spec.xml: ditto
core/application/src/OcpiApplication.cxx: better error message, readability check for dumping props
-- missing member initializations
core/container/hdl_container/bin/src/ocpihdl_main.cxx: better debug info for simulation
core/container/hdl_container/impl/src/HdlContainer.cxx: support no-control workers (adapters)
core/local/util/assembly/include/OcpiUtilAssembly.h: add (default) package attribute to assembly
-- and parse package names for components
core/local/util/assembly/src/OcpiUtilAssembly.cxx: ditto
core/local/util/misc/include/OcpiUtilMisc.h: make replace-nl-with-comma optional in file2string
core/local/util/misc/src/OcpiUtilMisc.cxx: ditto
core/local/util/property/src/OcpiUtilValue.cxx: add error check for too much array data
hdl/adapters/Makefile: add package name to hdl adapter library
hdl/adapters/wsi_32_to_16.hdl/wsi_32_to_16.vhd: fix bugs with partial 32-bit values/byte-enables
hdl/adapters/wsi_32_to_16.hdl/wsi_32_to_16.xml: don't use generic spec, but specific embedded one
hdl/assemblies/Makefile: add tb_bias_vhdl
hdl/devices/Makefile: add package name to device worker library
hdl/primitives/ocpi/ocpi_util.vhd: add special pipelined fifo signature (FIFO2X)
hdl/primitives/ocpi/ocpi_util_impl.vhd: improve/debug message boundary module
hdl/primitives/ocpi/ocpi_wci_impl.vhd: fix writing multiple array values in one 32 bit write
hdl/primitives/ocpi/ocpi_wsi_impl.vhd: use new fifo with pipelined "full"
test/hdl/scripts/runSimExec.isim: remove shell debug flags
tools/cdk/include/hdl/hdl-assy.mk: improve dependencies through symbolic links (not totally fixed)
tools/cdk/include/hdl/hdl-pre.mk: ditto
tools/cdk/include/lib.mk: support package names
tools/cdk/ocpigen/bin/src/ocpigen_main.cxx: support package names and nocontrol
tools/cdk/ocpigen/ocpigen/src/wip_HDL.cxx: ditto
tools/cdk/ocpigen/ocpigen/src/wip_parse.cxx: ditto
hdl/adapters/Makefile: Libraries->HdlLibraries
hdl/platforms/isim_pf/Makefile: ditto
hdl/platforms/ml555/Makefile: ditto
hdl/platforms/schist/Makefile: ditto
hdl/platforms/xsim_pf/Makefile: ditto
hdl/devices/adc.rcc/adc.c: rename output port to be generic, not WSI
hdl/devices/specs/adc_spec.xml: ditto