Fix loosing logic/bit difference and -x-initial-edge fallout, bug604.

Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
Fix DECLFILENAME warning on .
Fix package logic var compile error.
Internals: Rename range lo/hi to match IEEE.
Internals: Ast classes create declRange().
Support VPI product info, warning calls, etc, bug588.
Fix struct +: slices, bug605.
Tests: Make struct test pass.
Maintain little endian indication for multidimensional arrays
Fix signed/unsigned parameter misconversion, bug606.
Merge branch 'master' into verilog-short-circuit