build: Fix clean target to really remove all build directories

Signed-off-by: Diego Biurrun <diego@biurrun.de>
build: Add separate target to clean guest tools

Signed-off-by: Diego Biurrun <diego@biurrun.de>
build: Split "distclean" target off from "clean" target

"clean" just removes qemu and klee, "distclean" removes everything
except for the downloaded tarballs.

Signed-off-by: Diego Biurrun <diego@biurrun.de>
build: Replace stamps-based targets for tarball extraction by file targets

This is more robust as it updates the targets when a prerequisite changed.

Signed-off-by: Diego Biurrun <diego@biurrun.de>
build: Reuse source copying rules for STP source copies

Signed-off-by: Diego Biurrun <diego@biurrun.de>
build: Add a separate rule to create the stamps directory

Signed-off-by: Diego Biurrun <diego@biurrun.de>
build: Create directories through dependencies instead of recipe commands

Signed-off-by: Diego Biurrun <diego@biurrun.de>
x86_64-s2e-softmmu.mak: create default s2e x86_64 config

Create the default-config file for x86_64-s2e-softmmu

Signed-off-by: Michael Contreras <michael@inetric.com>
target-i386:op_helper: Use _W macros for register writes

Update the register writes to use the _W macros when TARGET_X86_64 is defined.

Signed-off-by: Michael Contreras <michael@inetric.com>
target-i386:op_helper:tlb_fill: use addr with TARGET_PAGE_MASK

Instead of passing page_addr, pass addr & TARGET_PAGE_MASK to
cpu_x86_handle_mmu_fault(). When running in 64 bit mode, page_addr will have
the upper unused bits set to 0xf, which will cause problems. The reason for
passing the page address instead of the address is mentioned in the comments:

    In S2E we pass page address instead of addr to cpu_x86_handle_mmu_fault,
since the latter can be symbolic while the former is always concrete.  To
compensate, we reset fault address here.

Signed-off-by: Michael Contreras <michael@inetric.com>
vl: use TARGET_ARCH define for QEMU_FILE_TYPE_LIB

Use TARGET_ARCH define to load the correct bytecode lib for s2e-softmmu in
qemu_find_file

Note: Still a terrible hack.

Signed-off-by: Michael Contreras <michael@inetric.com>
S2EExecutionState:getSymbolicRegistersMask: x86_64 Support

Modify S2EExecutionState::getSymbolicRegistersMask to support 64 bit regisers
and the new CPUX86State structure layout. Use offsetof() to get the flag
offsets: this prevents mismatches between the expectations of the CPUX86State
structure.

Signed-off-by: Michael Contreras <michael@inetric.com>
CorePlugin: limit copy size to prevent overflow

Limit the amount of bytes that can be copied into value to prevent any possible
overflows in s2e_trace_memory_access_slow().

Signed-off-by: Michael Contreras <michael@inetric.com>
CorePlugin: Set EIP support for x86_64

Add support for setting the EIP using 64 bit registers in
s2e_tcg_instrument_code().

Signed-off-by: Michael Contreras <michael@inetric.com>
softmmu: make ADDR_MAX target dependent

Make the ADDR_MAX define a target_ulong dependent value.

Signed-off-by: Michael Contreras <michael@inetric.com>
tcg-llvm: Use target max and make truncation target aware

Use target dependent max when calling the forkAndConcretize helper, and make
the truncation size target aware in handleSymbolicPcAssignment().

Signed-off-by: Michael Contreras <michael@inetric.com>
tcg-llvm: Make __ST_OP target aware

Make __ST_OP use TARGET_LONG_BITS when checking for symbolic EIP writes in
TCGLLVMContextPrivate::generateOperation().

Signed-off-by: Michael Contreras <michael@inetric.com>
tcg-llvm: implement deposit_i64

Implement the deposit_i64 operation.

Signed-off-by: Michael Contreras <michael@inetric.com>
MMUFunctionHandlers: quad versions of ld and st helpers

Add 64 bit quad versions for the load and store helpers for _mmu and _kernel.
Helpers for: __ldq_mmu __stq_mmu ldq_kernel stq_kernel

Signed-off-by: Michael Contreras <michael@inetric.com>
S2EExecutionState:undoCallAndJumpToSymbolic: use target_ulong

Use target_ulong in S2EExecutionState::undoCallAndJumpToSymbolic to calculate
the offset of the stack pointer.

Note: This is still x86 architecture dependent.

Signed-off-by: Michael Contreras <michael@inetric.com>