The patch fixes the assembly of the Power dcbtst and dcbt instructions.

The assembly of these instructions is not alwasy being done correctly as
described in the following email reply.

  Re: Assembling Power instructions: dcbtst/dcbt.

      From: Peter Bergner <bergner at vnet dot ibm dot com>
      To: Paralkar Anmol-B07584 <B07584 at freescale dot com>
      Cc: "amodra at bigpond dot net dot au" <amodra at bigpond dot net dot au>, "binutils at sourceware dot org" <binutils at sourceware dot org>
      Date: Fri, 13 Sep 2013 15:22:35 -0500
      Subject: Re: Assembling Power instructions: dcbtst/dcbt.
      Authentication-results: sourceware.org; auth=none
      References: <DC6D7B34688246489A6578981A5ADEB9302A07 at 039-SN2MPN1-012 dot 039d dot mgd dot msft dot net>

  On Fri, 2013-09-13 at 18:32 +0000, Paralkar Anmol-B07584 wrote:
  > Hello,
  >
  >  Per Power ISA Version 2.07 (May 3, 2013) "4.3.2 Data Cache Instructions",
  >  the assembly language syntax for the dcbtst instruction (pp. 771) is:
  >
  >  dcbtst RA,RB,TH [Category: Server]
  >  dcbtst TH,RA,RB [Category: Embedded]
  >
  >  and it's layout in the object code is:
  >
  >   +------+------+------+------+------------+---+
  >   |  31  |  TH  |  RA  |   RB |  246(0xF6) | / |
  >   |0     |6     |11    |16    |21          |31 |
  >   +------+------+------+------+------------+---+
  >
  >  (Analogously: dcbt pp. 770)
  >
  >  However, GAS (as of version 2.23.52.20130912) decides on the syntax to use based on
  >  processor/architecture dialect (not Power ISA Category), using the Server syntax in
  >  the case of POWER4 and the Embedded syntax for generic PPC or VLE.

  That was a bug fixed here:

      https://sourceware.org/ml/binutils/2012-11/msg00352.html

  >  Consequently (e.g.),
  >
  >  dcbtst 17, 14, 6
  >
  >  in the assembly file gets "misassembled" under -many for a user-space program on Linux:

  When you only specify -many (and not one of -mpower4, -mpower5, etc.),
  the assembler/disassembler will choose a default -m<CPU> value for
  you.  That has changed over time, but is generally one of the newer
  server cpus.  For example, for binutils trunk, the default is now
  -mpower8 and for your 2.23.x binutils, it is -mpower7.
  That should force the assembler and disassembler to assemble
  the instruction using the server operand order you want, but the bug
  above (which is in 2.23) basically resets it to an old cpu, so it
  chooses to use the embedded/old cpu setting.

The patch from Amodra fixes the issue by manually generating the correct
hex value for the instruction rather then leaving it to the assembler to
generate the hex value from the symbolic assembly instruction name.

This is the fix for Bugzilla 324765.  

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13562 a5019735-40e9-0310-863c-91ae7b9d1cf9