mesa: Update the BGRA vertex array error handling

The error code was changed from INVALID_VALUE to INVALID_OPERATION
in OpenGL 3.3. We should also generate an error when size is BGRA
and normalized is FALSE.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
nv30: remove no-longer-used formats from table

Commit 14ee790df77 removed the formats from the vtxfmt_table but forgot
to also update the info_table.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "9.2 and 9.1" <mesa-stable@lists.freedesktop.org>
nv50: separate video logic from noalloc

The upcoming vp3 logic will want the video layout, but allocated by the
miptree.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: add vp3/vp4 support for mpeg2/vc1

h264/mpeg4 remain disabled for pre-nvc0, there's some minor
bug/difference which causes the decoding to hang after some frames.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
meta: Fix blitting a framebuffer with renderbuffer attachment

This patch fixes a case of framebuffer blitting with renderbuffer
as color attachment and GL_LINEAR filter. Meta implementation of
glBlitFrambuffer() converts source color buffer to a texture and
uses it to do the scaled blitting in to destination buffer. Using
the exact source rectangle to create the texture does incorrect
linear filtering along the edges. This patch makes the changes to
extend the texture edges by one pixel in x, y directions. This
ensures correct linear filtering.
It fixes failing piglit fbo-attachments-blit-scaled-linear test.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
CC: "9.2" <mesa-stable@lists.freedesktop.org>
CC: "9.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965/blorp: Use more appropriate variable names

When we talk about both multi-sample and single-sample scaled blits,
rect_grid_{x1, y1} are more appropriate variable names as compared
to sample_grid_{x1, y1}. There are no functional changes in this patch.
It just prepares for the BLORP implementation of single-sample scaled
blit with bilinear filter.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965/blorp: Define a function to clamp texture coordinates

New function clamp_tex_coords() clamps the texture coordinates
to texture boundaries.  This function will also be utilized later
for the BLORP implementation of single-sample scaled blit with
bilinear filter.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965/blorp: Add support for single sample scaled blit with bilinear filter

Currently single sample scaled blits with GL_LINEAR filter falls
back to meta path. Patch removes this limitation in BLORP engine
and implements single sample scaled blit with bilinear filter.
No piglit, gles3 regressions are observed with this patch on Ivybridge.

V2: Use "sample" message to utilize the linear filtering functionality
built in to hardware.
V3: Define a bool variable (bilinear_filter) to handle the conditions
for GL_LINEAR blits.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965: Emit MOVs for neg/abs.

Necessary to avoid combining a bitcast and a modifier into a single
operation. Otherwise if safe, the MOV should be removed by
copy-propagation or register coalescing.

With this and the next patch, there are only four changes in shader-db:
all a single extra instruction. The code does something like
   mov a.w, -b.x
and copy propagation doesn't work because it only handles no-op
swizzles. Seems acceptable, given the known limitation of our copy
propagation.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Paul Berry <stereoytpe441@gmail.com>
i965: Don't copy propagate bitcasts with source modifiers.

Previously, copy propagation would cause bitcast_f2u(abs(float)) to
be performed in a single step, but the application of source modifiers
(abs, neg) happens after type conversion, leading to incorrect results.

That is, for bitcast_f2u(abs(float)) we would in fact generate code to
do abs(bitcast_f2u(float)).

For example, whereas bitcast_f2u(abs(float)) might result in a register
argument such as
   (abs)g2.2<0,1,0>UD

v2: Set interfered = true and break in register_coalesce instead of
    returning false.

Reviewed-by: Paul Berry <stereoytpe441@gmail.com>
i965: Add Gen6 depth stall flushes before disabling depth in BLORP.

We emit these before configuring depth in the normal path, or actually
using the depth buffer in BLORP - we just failed to emit them when
disabling depth altogether.

On Sandybridge, this also requires the post_sync_nonzero flush.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965: Add Gen7 depth stall flushes before disabling depth in BLORP.

We emit these before configuring depth in the normal path, or actually
using the depth buffer in BLORP - we just failed to emit them when
disabling depth altogether.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965: Dump more information about batch buffer usage.

Previously, INTEL_DEBUG=bat would dump messages like:

intel_mipmap_tree.c:1643: Batchbuffer flush with 456b used

This only reported the space used for command packets, and didn't
report any information on the space used for indirect state.

Now it dumps:

intel_context.c:366: Batchbuffer flush with 6128b (pkt) + 4288b (state)
= 10416b (31.8%)

This conveniently shows the breakdown of space used for packets vs.
state, as well as the percentage of batchbuffer space.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
radeonsi/compute: Let the state tracker do all the flushing

It shouldn't be necessary to call radeon_winsys::cs_flush() from
radeonsi_launch_grid(), because the state tracker is responsible for
flushing the pipeline at the appropriate time.  The current behavior is
also wrong, because radeonsi_launch_grid() submits packets to the
compute ring, but when the state tracker calls pipe->flush() everything
is submitted to the graphics ring.  This has the potential to create a
race condition.

The downside of removing this flush is that the compute dispatch packets
will be sent to the graphics ring rather than the compute ring.
In the future we will need to come up with a way to detect 'compute'
command streams and submit them to the appropriate ring.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
radeonsi: add flexible shader descriptor management and use it for sampler views

It moves all sampler view descriptors to a buffer.
It supports partial resource updates and it can also unbind resources
(required for FMASK texturing).

The buffer contains all sampler view descriptors for one shader stage,
represented as an array. On top of that, there are N arrays in the buffer,
which are used to emulate context registers as implemented by the previous
ASICs (each array is a context).

This uses the RCU synchronization approach to avoid read-after-write hazards
as discussed in the thread:
"radeonsi: add FMASK texture binding slots and resource setup"

CP DMA is used to clear the descriptors at context initialization and to copy
the descriptors from one context to the next.

v2: - use PKT3_DMA_DATA on CIK (I'll test CIK later)
    - turn the bool CP DMA parameters into self-explanatory flags
    - add a nice simple API for packet emission to radeon_winsys.h
    - use 256 contexts, 128 causes texture corruption in openarena
radeonsi: implement uncompressed MSAA rendering and color resolving

This is basic MSAA support which should work with most apps.
Some features are missing, those will be implemented by other commits.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: implement GL_SAMPLE_ALPHA_TO_ONE

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: disable alpha-to-coverage for integer colorbuffers

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: implement uncompressed MSAA texturing

This is glBlitFramebuffer support for MSAA surfaces as required by GL 3.0
and texturing as required by GL 3.2 and GL_ARB_texture_multisample.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: implement MSAA colorbuffer compression for rendering

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>