HACK for python-2.4.3

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Use TCGMemOp within qemu_ldst routines

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Use shortcuts for nop insns

There's no need to go through the full opcode-to-insn function call
to generate nops.  This makes the source a bit more readable.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Handle constant calls

Using only indirect calls results in 3 bundles (one to load the
descriptor address), and 4 stop bits.  By looking through the
descriptor to the constants, we can perform the call with 2
bundles and only 1 stop bit.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Simplify brcond

There was a misconception that a stop bit is required between a compare
and the branch that uses the predicate set by the compare.  This lead to
the usage of an extra bundle in which to perform the compare.  The extra
bundle left room for constants to be loaded for use with the compare insn.

If we pack the compare and the branch together in the same bundle, then
there's no longer any room for non-zero constants.  At which point we
can eliminate half the function by not handling them.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Move AREG0 to R32

Since the move away from the global areg0, we're no longer globally
reserving areg0.  Which means our use of R7 clobbers a call-saved
register.  Shift areg0 into the windowed registers.  Indeed, choose
the incoming parameter register that it comes to us by.

This requires moving the register holding the return address elsewhere.
Choose R33 for tidiness.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Avoid unnecessary stop bit in tcg_out_alu

When performing an operation with two input registers, we'd leave
the stop bit (and thus an extra cycle) that's only needed when one
or the other input is a constant.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Use ADDS for small addition

Avoids a wasted cycle loading up small constants.

Simplify the code assuming the tcg optimizer is going to work
and don't expect the first operand of the add to be constant.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Use SUB_A3 and ADDS_A4 for subtraction

We can subtract from more small constants that just 0 with one insn,
and we can add the negative for most small constants.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Use A3 form of logical operations

We can and/or/xor/andcm small constants, saving one cycle.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64 Introduce tcg_opc_mov_a

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64 Introduce tcg_opc_movi_a

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64 Introduce tcg_opc_ext_i

Being able to "extend" from 64-bits (with a mov) simplifies
a few places where the conditional breaks the train of thought.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64 Introduce tcg_opc_bswap64_i

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Re-bundle the tlb load

This sequencing requires 5 stop bits instead of 6, and has room left
over to pre-load the tlb addend, and bswap data prior to being stored.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Move bswap for store into tlb load

Saving at least two cycles per store, and cleaning up the code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ia64: Move tlb addend load into tlb read

Signed-off-by: Richard Henderson <rth@twiddle.net>
fixup! tcg-ia64 Introduce tcg_opc_bswap64_i
tcg-i64: Reduce code duplication in tcg_out_qemu_ld

The only differences were in the bswap insns emitted.

Signed-off-by: Richard Henderson <rth@twiddle.net>