target-arm: aarch64: add support for logical (immediate) insns

this patch adds support for C3.4.4 Logical (immediate),
which include AND, ANDS, ORR, EOR.
It also includes a way to access the registers when
register 31 means SP.

Signed-off-by: Alexander Graf <agraf@suse.de>

[claudio: adapted to new decoder, minor function renaming,
          removed a TCG temp variable]

Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>

From Alexander Graf <agraf@suse.de> aarch64 series 29/60