F0 compat fixes

I checked your headers and files against the CM0/ARMv6-M-docs and found some discrepancies:

 - The CM0 has no MPU. The CM0+ has one, but we don't seem to be targeting it right now.
 - Copy-and-paste error in the CPUID-subfield-mask.
 - SHCSR and DFSR are only accessible from the DAP and make no sense in this library.

Please cherry-pick as you see fit.