ARM: tegra: add missing clock documentation to DT bindings

FIXME

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: document reset properties in DT bindings

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: update DT files to match clock/reset docs in bindings

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: select the reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
clk: tegra: implement a reset driver

FIXME:...

Signed-off-by: Stephen Warren <swarren@nvidia.com>
pci: tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
drm/tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: pass reset to tegra_powergate_sequence_power_up()

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
dma: tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
i2c: tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
staging: nvec: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
spi: tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Input: tegra-kbc - use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
serial: tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
USB: EHCI: tegra: use reset framework

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: remove legacy clock entries from DT

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
clk: tegra: remove legacy reset APIs

FIXME:

Signed-off-by: Stephen Warren <swarren@nvidia.com>
clk: tegra: remove bogus PCIE_XCLK

FIXME:
(only existed to act as a reset; not a real clock)

Signed-off-by: Stephen Warren <swarren@nvidia.com>
dma: tegra: add support for Tegra148/124

Tegra148 introduces a few changes to the APB DMA HW registers. Update the
driver to cope with them. Tegra124 inherits these changes.

* The register address stride between DMA channels increases.

* A new per-channel WCOUNT register is introduced.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
[swarren, remove .dts file change, rewrote commit description, removed
some duplicate code and register IO]
Signed-off-by: Stephen Warren <swarren@nvidia.com>