target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup

The if block detecting OMAP/StrongARM modifies the id_cp_reginfo
.access fields in place. So there is no need to replicate the call
to define_arm_cp_reg(). Dropped, and let the OMAP case fall through
to the normal behaviour after the in-place modification.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
target-arm/helper.c: Implement MIDR aliases

Unimplemented registers in the cp15, CRn=0, opc1=0, CRm=0 space default
to aliasing the MIDR register. Set all registers in the space to access
MIDR by default.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
COVER: ARM CP15 patches

---CHANGELOG---
Two patches to ARM C15 crn=0 logic. First is an implementation cleanup
(0 functional diff).

Second implements the MIDR defaulting behaviour.

I have dropped the REVIDR patch, as it just RAZed.  The MIDR default
will achieve a similar end (all I needed was to avoid the abort).
---END---

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>