Successfully booted from Stack RAM.
Added missing PLL files for DE1, moved boot code to start of section to fix alignment problem.
Boot ROM successfully sharing Stack RAM
Reduced LE count a little by zeroing fewer bits on Emulate/Interrupt - so will work once again with high-mapped Boot ROM.
Shrunk boot code
Minimal version with no RAM execute now working.
Changed StackRAM address, allowing boot code to be shorter.
Simplified address decoding a little.
Firmware now harmlessly spins when done.
Added DE2 Project, supported looping and firmware now takes Manifest filename from registers.
Updated C3Board project.
Updated README
Reworked Stack RAM mapping to make more traditional use of the ZPU easier.
Changed back to boot firmware and small ROM having verified DE1 and DE2 ports.
Tidied up firmware generation.
Now building VHDL ROMs.
fixed filenames
Now using VHDL ROM instantiated outside the CPU core.
Make building of .mifs optional since it requires srec_cat.
Updated readme