MI-Sched: Adjust regpressure limits for reserved regs.

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MI-Sched: cleanup DEBUG output.

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Fix IMULX machine model. Multiple def operands require multiple SchedWrites.

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Make rematerialization in the coalescer less sensitive to LRG order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184567 91177308-0d34-0410-b5e6-96231b3b80d8
Modify the -join-globalcopies option (off by default).

Always coalesce in forward order to propagate rematerialization.
I'm fixing this option so I can enable it by default soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184568 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a -join-globalcopies bug; handle undef operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184569 91177308-0d34-0410-b5e6-96231b3b80d8
whitespace

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Refactor LiveRangeEdit::eliminateDeadDefs.

I want to add logic to handle more cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184571 91177308-0d34-0410-b5e6-96231b3b80d8
Handle more cases in LiveRangeEdit::eliminateDeadDefs.

Live intervals for dead physregs may be created during coalescing. We
need to update these in the event that their instruction goes away.

crash.ll is the unit test that catches it when MI sched is enabled on
X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184572 91177308-0d34-0410-b5e6-96231b3b80d8
Added -precompute-phys-liveness for testing LiveIntervals updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184573 91177308-0d34-0410-b5e6-96231b3b80d8
Update physreg live intervals during remat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184574 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR16360

When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the
high bits are not cleared. Add 'and' to clear off them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184575 91177308-0d34-0410-b5e6-96231b3b80d8
Add missing REQUIRES: asserts in crash.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184576 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Add support for selecting CUDA vs OCL mode based on triple

IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL should use "nvptx[64]-nvidia-nvcl"

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