msm_fb: hdmi: Return proper clock get error code

This change returns the proper error code while in probe and trying
to get the required clock and fails. This is required for probe deferral
support.

Change-Id: Ief91b1f634c06d3679157313506b56e5948aa79c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
ASoC: WCD9304: Add the compander support to wcd9304

The compander system is intended to increase the dynamic
range of an input signal. But for the wcd9304 codec,
this feature is to use companding in a novel way in the DAC
converter path to increase the signal noise ratio.
The change is to add the compander support to wcd9304
codec. The dynamic compander enable/disable during stream
playback is not supported.

Change-Id: If912302ee9d48dde1318e894a982cba591908d8f
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
msm: mdm: change where ssr_count is decremented

In fusion targets with more than one external modem, where
the modems are restarted together, ssr_count keeps track of
how many modems are still left to be completely restarted so
that any new SSR requests would be rejected until all modems
are restarted. Ssr_count should be decremented when the SSR
module sends the SUBSYS_AFTER_POWERUP notification instead of
during the powerup callback in order to be in sync with the
state of the SSR module.

Change-Id: I196f4937d929c54f475d251632f111404a2b3bf1
Signed-off-by: Joel King <joelking@codeaurora.org>
msm: msm_bus: Correct the return value from register-client

On failure, return 0, and not a non-zero value as that can
be interpreted as a valid client ID.

CRs-Fixed: 486328
Change-Id: I7a5b448bc398b4a4792170147a5e5317d25f8b3c
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
msm: camera: Add state check for sensor power up & down

Sensor state check added to avoid incorrect power up &
power down calls.

Change-Id: I278e8be1e346f93fa410b38086388f08c4f6ae31
Signed-off-by: Aditya Jonnalagadda <ajonnala@codeaurora.org>
ALSA: PCM: volume API implementation

Introduced a new helper function snd_pcm_add_volume_ctls() to
create control elements representing the volume for each PCM
(sub)stream.

Change-Id: Id483257c4fe84a909e7a4af3a5aa3e4f0d5d9ea5
Signed-off-by: Damir Didjusto <damird@codeaurora.org>
ASoC: msm: Add PCM loopback volume control

Add PCM loopback volume controls.

Change-Id: I4d942c16b524797ca535dd0467a830d19963e967
Signed-off-by: Damir Didjusto <damird@codeaurora.org>
msm_fb: Correct R and G offsets for correct mapping

R and G colors are swapped when ARGC test cases are executed.
Correct the color mapping to right register offset to fix
the color swapping issue.

CRs-Fixed: 491215

Change-Id: I4997acce577bdbbdf39e22502a678dbecf0bfc37
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
msm: audio: qdsp6v2: Fix for kernel crash during stability

- Userspace calling AYSN_READ during flush, READ_DONE ack for
  this is coming after FLUSH_DONE which is hitting BUG_ON as
  buffers are removed from in_queue/out_queue during flush.
- Fix is to avoid sending READ requests to DSP until flush
  is complete.

CRs-Fixed: 485288
Change-Id: Ia2a64471a3507b3f5565b695c40cc6dd9081930d
Signed-off-by: Deepa Madiregama <dmadireg@codeaurora.org>
msm: display: Proper handling of prepare and unprepare clocks

This change handles prepare and unprepare clocks properly to
fix clock mismatches.

Change-Id: I09986aa1f0e1a5be2e07655a1db0d23760dd0725
Signed-off-by: Sangani Suryanarayana Raju <csuryan@codeaurora.org>
msm_serial_hs: Use RFR GPIO to communicate remote uart

CTS and RFR GPIOs are used for hardware flow control between
two uarts. RFR GPIO provides current status of uart receiver
to remote uart and based on this remote uart sends data.
Hence use this functionality to prevent remote uart to send
data when port is being opened, baud rate change operation
is in progress and port is being closed.

This change also set UART_DM_MR2 (Bit: 8 and 9) before
configuring connected UART GPIOs to prevent RX_BREAK character
and any character having PARTIY or FRAMING error which can be
generated due to configuration of those GPIOs. Allows those
character once port is opened successfuly.

This change also zeroed uart rx software buffer which would
help to see how many bytes copied by ADM from received data
with UART RX FIFO to this memory. This would be useful if
there is any Rx Stall issue is seen.

CRs-Fixed: 495564
Change-Id: I69382994356073c4c86f205015503c935ad09e8d
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
msm: pm: send notification only for SPC and PC

Today the pm notification is sent for all the power
modes of each CPU. This is not necessary for shallow
power modes.

This change is to send the notification for only
standalone power collapse for each core and idle
power collapse of core0.

Change-Id: I9b3df3d72e43d645387c94b1b9c5da3bcf2f2e5f
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
Merge "ASoC: WCD9304: Add the compander support to wcd9304"
diag: Fix diag crash due to memory corruption

Diag allocates memory based on the count received from userspace.
Add check to validate the memory pointer before derefencing it.

CRs-Fixed: 487981
Change-Id: Ibfee22d02bb2312192de7c811d9917ecab728269
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Merge "msm: mdm: change where ssr_count is decremented"
leds: pm8xxx: Enable PWM LPG banks based on max current

The current design enables PWM LPG high bank with out
checking the max current. So enable PWM LPG low bank when max
current configured as 4mA and enable PWM LPG high bank when
the max current configured as 8mA. Enabled both PWM LPG low bank
and PWM LPG high bank when max current configure as 12mA.

CRs-Fixed: 486318
Change-Id: I6686ed85d78fa55f08491a47c10581407e0cd70e
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
timer: Don't reinitialize the cpu base lock during CPU_UP_PREPARE

An inactive timer's base can refer to a offline cpu's base.

In the current code, cpu_base's lock is blindly reinitialized
each time a CPU is brought up. If a CPU is brought online
during the period that another thread is trying to modify an
inactive timer on that CPU with holding its timer base lock,
then the lock will be reinitialized under its feet. This leads
to following SPIN_BUG().

<0> BUG: spinlock already unlocked on CPU#3, kworker/u:3/1466
<0> lock: 0xe3ebe000, .magic: dead4ead, .owner: kworker/u:3/1466,
 .owner_cpu: 1
<4> [<c0013dc4>] (unwind_backtrace+0x0/0x11c) from [<c026e794>]
(do_raw_spin_unlock+0x40/0xcc)
<4> [<c026e794>] (do_raw_spin_unlock+0x40/0xcc) from [<c076c160>]
(_raw_spin_unlock+0x8/0x30)
<4> [<c076c160>] (_raw_spin_unlock+0x8/0x30) from [<c009b858>]
(mod_timer+0x294/0x310)
<4> [<c009b858>] (mod_timer+0x294/0x310) from [<c00a5e04>]
(queue_delayed_work_on+0x104/0x120)
<4> [<c00a5e04>] (queue_delayed_work_on+0x104/0x120) from [<c04eae00>]
(sdhci_msm_bus_voting+0x88/0x9c)
<4> [<c04eae00>] (sdhci_msm_bus_voting+0x88/0x9c) from [<c04d8780>]
(sdhci_disable+0x40/0x48)
<4> [<c04d8780>] (sdhci_disable+0x40/0x48) from [<c04bf300>]
(mmc_release_host+0x4c/0xb0)
<4> [<c04bf300>] (mmc_release_host+0x4c/0xb0) from [<c04c7aac>]
(mmc_sd_detect+0x90/0xfc)
<4> [<c04c7aac>] (mmc_sd_detect+0x90/0xfc) from [<c04c2504>]
(mmc_rescan+0x7c/0x2c4)
<4> [<c04c2504>] (mmc_rescan+0x7c/0x2c4) from [<c00a6a7c>]
(process_one_work+0x27c/0x484)
<4> [<c00a6a7c>] (process_one_work+0x27c/0x484) from [<c00a6e94>]
(worker_thread+0x210/0x3b0)
<4> [<c00a6e94>] (worker_thread+0x210/0x3b0) from [<c00aad9c>]
(kthread+0x80/0x8c)
<4> [<c00aad9c>] (kthread+0x80/0x8c) from [<c000ea80>]
(kernel_thread_exit+0x0/0x8)

As an example, this particular crash occurred when CPU #3 is executing
mod_timer() on an inactive timer whose base is refered to offlined CPU #2.
The code locked the timer_base corresponding to CPU #2. Before it could
proceed, CPU #2 came online and reinitialized the spinlock corresponding
to its base. Thus now CPU #3 held a lock which was reinitialized. When
CPU #3 finally ended up unlocking the old cpu_base corresponding to CPU #2,
we hit the above SPIN_BUG().

CPU #0			CPU #3				       CPU #2
------			-------				       -------
.....			 ......				      <Offline>
			mod_timer()
			 lock_timer_base
			  spin_lock_irqsave(&base->lock)

cpu_up(2)		 .....				        ......
							 init_timers_cpu()
.....		 	 spin_unlock_irqrestore(&base->lock)     ......
			   <spin_bug>

Allocation of per_cpu timer vector bases is done only once under
"tvec_base_done[]" check. In the current code, spinlock_initialization
of base->lock isn't under this check. When a CPU is up each time the base
lock is reinitialized. Move base spinlock initialization under the check.

CRs-Fixed: 471127
Change-Id: I73b48440fffb227a60af9180e318c851048530dd
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Merge "msm: audio: qdsp6v2: Fix for kernel crash during stability"
Merge "msm_fb: Correct R and G offsets for correct mapping"
Merge "msm: pm: send notification only for SPC and PC"