thermal: tsens8960: Increase the polling rate

Change the polling rate at which the sensors temperature
is read from 1 second to .25 seconds. On faster parts
there is a need to poll the temperature at a higher
frequency to improve reporting temperature changes.

Change-Id: I10049707c3e55316597fff72fbd00246cd29bed3
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Try @faux123 intellithermal which is essentially CAF msm_thermal with his tweaks and sysfs

Change-Id: I76b306a5c50ecfc41860fc9c46d08f32ab704534
msm: boards: Enable Krait Retention.

Add SPM sequences to do Krait retention for 8960,8930
and 8064. Also added a new rpmrs level containing the
latencies and power measurements for this new low power
state.

CRs-Fixed: 369864
Change-Id: Ib30a9a978cf38b35037810a4001c9277837acd4c
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
add to Mako board as well!

Signed-off-by: faux123 <reioux@gmail.com>
Update GPU and ION to msm-3.4

Change-Id: I0d8aea5529df17e3e80d1f83e6588d53327fca95
msm; mdss: increase max sync fence fd count

Current sync fence number is based on the maximum ammount of layers that
MDP can support, however application may send more than one fence
associated to a single layer. Increase the maximum ammount of sync
fences to allow most use cases.

Change-Id: I9b04ea7c864501433af86fe57c742634abfd7872
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
msm: acpuclock-krait: Use standard regulator APIs during CPU Hotplug

Voltage regulators supplying CPU cores need to be properly
notified when their underlying core goes offline. Use
regulator_disable() / regulator_enable() during this case to
notify them. Also make calls to regulator_set_voltage to
complement the regulator_disable call, since in the regulator
framework voltages are orthogonal to enable / disable.

This solves a problem on msm8974 where the ganged regulator
voltage is left higher than necessary when offlining CPU cores.

CRs-fixed: 410992
Change-Id: I1e569924133d98e75343d8b4ff24901dd2951de7
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
msm: acpuclock-krait: Enable HFPLL for init only if switching to it

The existing code left the HFPLL enabled in hfpll_init(), even if
the CPU was detected to be at a non-HFPLL rate. Correct this for
power savings between when hfpll_init() and the first runtime CPU
frequency switch happen. This also ensure votes for HFPLL
regulators are not left unnecessarily asserted.

Change-Id: Iaca5dc7e4769bdbd494d669726ba9b500256f793
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-krait: Only print supported number of frequencies once

The current code prints the number of CPU frequencies supported
once for each possible CPU, even though the number of supported
frequencies is the same for each CPU. Cut down on log noise by
printing this number only once.

For example, print:

  [ 0.412932] acpuclk-8974 qcom,acpuclk.23: CPU Frequencies Supported: 11

...instead of:

  [ 0.426013] acpuclk-8974 qcom,acpuclk.23: CPU0: 11 frequencies supported
  [ 0.426052] acpuclk-8974 qcom,acpuclk.23: CPU1: 11 frequencies supported
  [ 0.426089] acpuclk-8974 qcom,acpuclk.23: CPU2: 11 frequencies supported
  [ 0.426124] acpuclk-8974 qcom,acpuclk.23: CPU3: 11 frequencies supported

Change-Id: Iaf15970e6cfcfaec79c0edf8564cab9141fbc05f
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-krait: Remove inapplicable 8064 errata workaround

The secondary MUX switching errata is worked around in the secure
warm-boot path, and does not require an in-kernel workaround.

For devices with older warm-boot code (without the workaround),
the removal of the kernel workaround is also safe. The errata
symptoms can only manifest themselves after an L2 power-collapse,
which can't occur until after all Krait CPUs have been brought
online at least once. Since the secondary MUX is only touched by
acpuclock when onlining CPUs for the first time, the MUX will
never be switched after L2 power-collapse.

Change-Id: If675cfab7f325a9f7af6e06ff5ed67bd65461f20
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock: Add a null check for acpuclk_data

If acpuclock fails to probe before a client calls acpuclk_get_rate,
a null dereference will occur. Fix this by adding the appropriate
checks.

Change-Id: If873a64711e9cc807b1734996f7c9358bb08161a
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: acpuclock: Fix acpuclk_data null pointer dereference

If acpuclk_data is null, dereferencing it in acpuclk_get_switch_time
causes a kernel panic.  Add pointer check to fix that.

Change-Id: I69b92671c8cf26cb45ec8f1193c147be2ebe4c16
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
msm: kgsl: Add separate GPU shader memory mapping

Add separate kernel memory mapping for GPU shader memory.
Previously, both the register and the shader memory were mapped
as one entity, with the mapping length being equal to combined
size of register memory and shader memory. Now, we separate the
shader memory mapping to help in cases of GPU devices where the
shader and register memory may not be adjacent. This helps to
dump the shader memory in the postmortem snapshot. By having a
separate mapping for shader memory, the snapshot dump routine
simply reads in the shader memory range specified and dumps.

Change-Id: I30e59dffe849fefcfbbaf0e5245cc1024ccedcb1
Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>
Update board files
msm: kgsl: Remove nap_allowed variable and functionality

Allow NAP on all targets.  The splitting of the clock enable
and disable calls into enable/prepare and disable/unprepare
allows us to safely make this change for all targets.

Change-Id: I03d909b86aef33631a887d159cf0a807a6d0ae75
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/msm8226-gpu.dtsi
	arch/arm/boot/dts/msm8610-gpu.dtsi
	arch/arm/boot/dts/msm8974-gpu.dtsi
	drivers/gpu/msm/adreno.c
	drivers/gpu/msm/kgsl.c
	drivers/gpu/msm/kgsl_pwrctrl.c
msm: clock-8960: Add 1.8MHz rate to 8064's gfx3d_clk plan

This rate will be used by the 'footswitch-8x60' driver when
controlling GFX3D power.

Change-Id: Ib796114dc90b468f1c0aa014a9db699f3b854adf
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: footswitch-8x60: Update 8064 footswitch_enable() sequence for GFX3D

Update 8064's GFX3D enable sequence per hardware designer recommendations
to improve system stability when responding to the inrush current event.

Differences from the standard footswitch_enable() sequence include:
 - Decreasing the reset_rate from 27MHz to 1.8MHz, and increasing
   reset_delay_us from 1us to 10us to compensate for the slower clock.
 - Enable clocks for reset propagation only after the core has been
   powered on.
 - Forcefully limit the AFAB and EBI1 clocks to a low value (decided
   by the RPM) by means of a write to the RPM_CTL RPM resource.
 - Removal of the reset toggle after powering on the core, which (while
   harmless) is not applicable to 8064.

Change-Id: I943842b56ff96b2e6077a419566d91ac184a6fda
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
board: 8064: add 192MHz clock support for SDC1 slot

8064 v2 HW can support card clock upto 192MHz on SDC1 slot.
This patch adds the support for same by checking the 8064
SOC revision.

Change-Id: I9a119adb2490d9eb7cb227c9ae47c4766d44f140
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>