PruneEH: Only merge attribute sets when used. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184041 91177308-0d34-0410-b5e6-96231b3b80d8
APInt: Add a fast case for isAllOnesValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184042 91177308-0d34-0410-b5e6-96231b3b80d8
Use 0 instead of NULL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184044 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: print DBG_VALUE MachineInstrs with [] for deref and drop the offset when it's zero

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184045 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: follow up to 184045 to constrain the tests further to ensure they don't contain +0 offsets

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184046 91177308-0d34-0410-b5e6-96231b3b80d8
Put back variable names because they are referenced in the documentation
comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184051 91177308-0d34-0410-b5e6-96231b3b80d8
Silence warning in Release builds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184059 91177308-0d34-0410-b5e6-96231b3b80d8
MachineOperand::setIsDebug should ensure the register is /not/ a definition

This currently unused function appeared to be asserting in the wrong
direction - DebugValues are never definitions of registers, only uses.
Curiously we don't perform any of these checks for the more common (&
actually used) case of MachineOperand::CreateReg (or other Create
functions).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184065 91177308-0d34-0410-b5e6-96231b3b80d8
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions

Rather than using the full power of target-specific addressing modes in
DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
reduces the complexity of debug info handling down to two
representations of values (reg+offset and frame index+offset) rather
than three or four.

Ideally we could ensure that frame indicies had been eliminated by the
time we reached an assembly or dwarf generation, but I haven't spent the
time to figure out where the FIs are leaking through into that & whether
there's a good place to convert them. Some FI+offset=>reg+offset
conversion is done (see PrologEpilogInserter, for example) which is
necessary for some SelectionDAG assumptions about registers, I believe,
but it might be possible to make this a more thorough conversion &
ensure there are no remaining FIs no matter how instruction selection
is performed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184066 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs

Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184067 91177308-0d34-0410-b5e6-96231b3b80d8