MIPS: xburst: use common serial code

The Ingenic JZ4740, JZ4755 and JZ4770 SoCs use
the same IP core for UART interface. This IP core
is NS16550-compatible, but it needs small workaround.

This commit moves the UART code for Ingenic SoCs
from board level to machine level. So the code
can be reused for different boards or even
different SoCs.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MIPS: rzx50: switch to common mach-xburst serial code

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MCI/MXS: fix signed/unsigned mismatch

Using the MXS MCI driver with an eight bit capable eMMC results into the
'devinfo' message the interface uses '0' bits for data transfer:

 barebox:/ devinfo mxs_mci0
 resources:
 num   : 0
 start : 0x80034000
 size  : 0x00002000
 driver: mxs_mci
 bus: platform

  Interface
   Min. bus clock: 1476 Hz
   Max. bus clock: 48000000 Hz
   Current bus clock: 24000000 Hz
   Bus width: 0 bit

The eight bit interface width is stored internally as value '2'. And a two bit
'2' ends up into 0xfffffffe when used as an array index. Using an unsigned
field instead fixes this issue:

 barebox:/ devinfo mxs_mci0
 resources:
 num   : 0
 start : 0x80034000
 size  : 0x00002000
 driver: mxs_mci
 bus: platform

  Interface
   Min. bus clock: 1476 Hz
   Max. bus clock: 48000000 Hz
   Current bus clock: 24000000 Hz
   Bus width: 8 bit

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXS: fix SoC detecting

The missing 'break' statement lets look an i.MX23 like an i.MX28.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
scripts: new kwbimage manipulation tool for Marvell SoC boot images

The Marvell EBU SoCs (Kirkwood, Armada 370, Armada XP) have a BootROM
that understand a specific image format, composed of a main header,
several extension headers and a paylod. This image can be booted from
NAND, SPI, SATA, UART, NOR, etc.

This patch adds a tool that allows to extract the components and
configuration of existing images, and to create new images.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
scripts: add kwboot tool

This tool is used with Marvell EBU SoC to trigger the UART boot mode
provided by the SoC BootROM, and push the bootloader image to the
target using the Xmodem protocol.

It has been taken from the U-Boot source code, with minor
modifications to make it work with Armada 370/XP platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tegra20: add pinctrl driver

This adds a pinctrl driver for the Tegra 20 line of SoCs. It only
supports the three basic pinconfiguration settings function mux,
tristate control and pullup/down control.

The driver understands the same devicetree bindings as the Linux one,
unimplemented pinconfiguration options will be ignored.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tegra: paz00: import pinconfig from Linux

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: remove unused clkdev.h

See also:

  commit eb84709192f1b616cd141594c34ddbc072c8d6ec
  Author: Sascha Hauer <s.hauer@pengutronix.de>
  Date:   Mon Mar 25 15:18:38 2013 +0100

      clk: remove unused __clk_[get|put]

      This is some unused code resulting from copying stuff from
      the kernel. Remove it.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
gpio: fix typos

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ppc: boards: add barebox.lds to .gitignore

Without this patch after compiling barebox
for a PowerPC board we have 'git status'
output looking like this:

  # Untracked files:
  #   (use "git add <file>..." to include in what will be committed)
  #
  #       arch/ppc/boards/pcm030/barebox.lds

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arm: initial support for Marvell Armada 370/XP SoCs

This commit adds minimal support for the Armada 370 and Armada XP SoCs
from Marvell.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arm: integrate kwbimage in the image generation

When a ARCH_MVEBU platform is selected, generate barebox.kwb and
barebox.kwbuart images from barebox.bin, using kwbimage.

barebox.kwb is generated by executing kwbimage on the board
kwbimage.cfg file, and is therefore designed to be booted from the
default boot media of the board, as defined by kwbimage.cfg (typically
a NAND flash or SPI flash).

barebox.kwbuart is generated by executing kwbimage on the board
kwbimage.cfg file, but by overriding the boot media to be UART. This
image is suitable for usage with the kwbtool and is generally useful
for recovery purposes.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Squashed this fixup:

arm: ensure the build doesn't fail when kwbimage lacks the binary blob

mach-mvebu images for Armada 370 and Armada XP SoC require a DDR3
training code which should be extracted from existing bootable images
for the relevant board. When such binary blob has not been extracted,
the build of the .kwb and .kwbuart images will fail. This is annoying
as it makes the build of all Armada 370/XP defconfig fail, which can
be a problem for automated builds.

This proposal makes the failure of kwbimage not a fatal failure for
the build process, and shows a warning. The user therefore sees:

====================================================================
  KWB     barebox.kwb
Didn't find the file 'plathome-openblocks-ax3-binary.0' in '/home/thomas/projets/barebox' which is mandatory to generate the image
This file generally contains the DDR3 training code, and should be extracted from an existing bootable
image for your board. See 'kwbimage -x' to extract it from an existing image.
Could not create image
WARNING: Couldn't create KWB image due to previous errors.
  KWBUART barebox.kwbuart
Didn't find the file 'plathome-openblocks-ax3-binary.0' in '/home/thomas/projets/barebox' which is mandatory to generate the image
This file generally contains the DDR3 training code, and should be extracted from an existing bootable
image for your board. See 'kwbimage -x' to extract it from an existing image.
Could not create image
WARNING Couldn't create KWB image due to previous errors.
====================================================================

The only drawback is that barebox-flash-image, which normally points
to barebox.kwb, becomes a stale symbolic link.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arm: add basic support for Armada XP OpenBlocks AX3 platform

The OpenBlocks AX3 platform is manufactured by PlatHome and uses the
MV78260 dual-core SoC from the Armada XP family.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arm: add basic support for the Armada 370 Mirabox platform

The Mirabox is a platform manufactured by Globalscale, and based on
the Marvell Armada 370 SoC.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arm: add basic support for the Armada XP GP platform

The Armada XP GP platform is an evaluation platform designed by
Marvell, that uses the MV78460 quad-core SoC from the Armada XP
family.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
gitignore: add kwb binary images to gitignore file

This adds barebox.kwb and barebox.kwbuart to the list of files to
be ignored by git.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of: separate out "generic" memory bank adding

This patch separates out the "generic" memory
segment registration function (of_add_memory_bank())
from of_add_memory().
The MIPS architecture has different view on memory
resources than the ARM and PPC architectures
so the "generic" of_add_memory_bank() is
unusable for the MIPS architecture.
We can add MIPS-specific of_add_memory_bank()
into arch/mips code.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MIPS: add initial device tree support

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MIPS: qemu-malta: add device tree support

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>