cc2538: Clean up port and pin definitions

Homogenize port and pin definitions naming:
 - PERIPHERAL_FUNCTION_PORT for the port ID,
 - PERIPHERAL_FUNCTION_PIN for the pin ID,
 - PERIPHERAL_FUNCTION_PORT_BASE for the port base,
 - PERIPHERAL_FUNCTION_PIN_MASK for the pin mask.

Define only PERIPHERAL_FUNCTION_PORT and PERIPHERAL_FUNCTION_PIN in board.h, and
deduce PERIPHERAL_FUNCTION_PORT_BASE and PERIPHERAL_FUNCTION_PIN_MASK in the
driver from the former definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: usb: Make the GPIO driving the pull-up optional

The data sheet recommends that the USB pull-up resistor be driven by a GPIO so
that it can be controlled by software, but this is not mandatory. Hence, leave
the choice so that CC253-based boards not using this option can build and work
fine.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: lpm: Give access to the SRAM non-retention area for PM2

If PM2 is enabled with LPM_CONF_MAX_PM, but not active, the non-retention area
of the SRAM can be useful to place temporary data that does not fit in the
low-leakage SRAM, typically after having called lpm_set_max_pm(LPM_PM1). Hence,
give access to this non-retention area thanks to .nrdata* sections.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538dk: Make it possible to override SLIP_ARCH_CONF_ENABLED

As the comment in contiki-conf.h says, the automatic definition of
SLIP_ARCH_CONF_ENABLED works only if UIP_FALLBACK_INTERFACE is tied to SLIP. If
UIP_FALLBACK_INTERFACE is set to another interface, SLIP_ARCH_CONF_ENABLED is
still automatically set to 1, leading to unwanted SLIP_END characters from
dbg.c:putchar() being printed on the UART.

This change makes it possible to force the definition of SLIP_ARCH_CONF_ENABLED
(e.g. from project-conf.h), so that it can be disabled if UIP_FALLBACK_INTERFACE
is used with something else than SLIP.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: gpio: Add macros to use GPIO power-up interrupts

The GPIO power-up interrupts have to be configured and enabled in order to be
able to wake-up the SoC from PM1+ upon a signal edge occurring on a GPIO input
pin.

This set of macros allows to:
 - configure the signal edge triggering a power-up interrupt,
 - enable and disable a power-up interrupt,
 - clear a power-up interrupt flag.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: gpio: Clear the power-up interrupts in the port ISRs

The pending GPIO power-up interrupts have to be cleared in the ISRs in order not
to re-trigger the interrupts and the wake-up events.

The power-up interrupts of all pins are cleared for each port in the
corresponding port ISR. This is done after calling the registered callbacks so
that the callbacks can know which pin woke up the SoC. This is done after
clearing the regular interrupt in order to avoid getting a new wake-up interrupt
without the regular interrupt in the case of a new wake-up edge occurring
between the two clears.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Merge pull request #466 from ADVANSEE/cc2538dk-slip-enable

cc2538dk: Make it possible to override SLIP_ARCH_CONF_ENABLED
Merge pull request #464 from ADVANSEE/cc2538-pm2-sram

cc2538: lpm: Give access to the SRAM non-retention area for PM2
Merge pull request #471 from ADVANSEE/cc2538-gpio-power-up

cc2538: gpio: Add support for power up
cc2538dk: startup-gcc: Do not redefine SYS_CTRL_EMUOVR

SYS_CTRL_EMUOVR is already defined in sys-ctrl.h, so #include this header file
instead of redefining SYS_CTRL_EMUOVR in startup-gcc.c.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: Add header file for flash CCA page and use it

Create a dedicated header file with all the definitions for the flash lock bit
page and customer configuration area. This avoids duplicating those definitions
in the startup-gcc.c files of all CC2538-based platforms, and this also allows
to easily manipulate the CCA from outside startup-gcc.c (e.g. for on-the-air
firmware update).

The definitions are now complete contrary to what was in startup-gcc.c:
 - Definitions have been added to select the bootloader backdoor pin and active
   level if enabled.
 - Definitions have been added to access the page and debug lock bits. The debug
   lock bit can be used to prevent someone from reading back a programmed
   firmware through JTAG if the firmware binary image has to be confidential,
   which should be combined with a disabled bootloader backdoor.
 - The application entry point is now tied to the beginning of the .text section
   instead of to the beginning of the flash. This allows projects using custom
   linker scripts to place the application entry point anywhere in the flash,
   which can be useful e.g. for on-the-air firmware update.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Remove LPP discussion from the cc2538 README
Merge pull request #463 from ADVANSEE/cc2538-ports-pins

cc2538: Clean up and improve port and pin definitions
Merge pull request #491 from g-oikonomou/remove-lpp-from-readme

Remove LPP discussion from the cc2538 README
Merge pull request #478 from ADVANSEE/cc2538-startup-cleanup

cc2538: Startup cleanup
cc2538: lpm: Fix energest context when aborting lpm_enter()

In one of the abort cases in lpm_enter(), the energest context has previously
been set to LPM, so the abort code needs to set it back to CPU.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: lpm: Let system clock transitions complete before further changes

As a matter of precaution, always make sure that pending system clock
transitions are complete before requesting a new change of the system clock
source.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: lpm: Speed up the transition to the 32-MHz XOSC after wake-up

As recommended by the CC2538 User's Guide, set SYS_CTRL_CLOCK_CTRL.OSC_PD to 0
before asserting WFI, and set it to 1 after the system clock is sourced from the
32-MHz XOSC following wake-up. This allows to automatically start both
oscillators upon wake-up in order to partially hide the 32-MHz XOSC startup time
by the 16-MHz RCOSC startup time.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
cc2538: lpm: Fix RTIMER_NOW() upon wake-up

When returning from PM1/2, the sleep timer value (used by RTIMER_NOW()) is not
up-to-date until a positive edge on the 32-kHz clock has been detected after the
system clock restarted. To ensure an updated value is read, wait for a positive
transition on the 32-kHz clock by polling the SYS_CTRL_CLOCK_STA.SYNC_32K bit,
before reading the sleep timer value.

Because of this RTIMER_NOW() fixup, lpm_exit() has to be called at the very
beginning of ISRs waking up the SoC. This also ensures that all clocks and
timers are enabled at the correct frequency and updated before using them
following wake-up.

Without this fix, etimers could sometimes (randomly, depending on timings)
become ultra slow (observed from 10x to 40x slower than normal) if the system
exited PM1/2 very often. This issue occurred more often with PM1.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Merge pull request #494 from ADVANSEE/cc2538-lpm-fixes

cc2538: lpm: Fix several issues