fhdl: TSTriple
doc: tristates
New 'specials' API
doc: new 'specials' API
fhdl: inline synthesis directive support
corelogic -> genlib
examples/fir: better filter
fhdl/verilog: support special lowering and overrides
genlib: clock domain crossing elements
examples/basic/psync: demonstrate the new features
examples/psync: cleanup
fhdl/specials/Instance: _printintbool -> verilog_printexpr
uio/ioo: fix specials
fhdl/specials: allow setting memory name
bank/description: memprefix
fhdl/verilog: insert reset before listing signals
Merge branch 'master' of git://github.com/milkymist/migen

Conflicts:
	migen/bus/wishbone.py
	migen/bus/wishbone2asmi.py
	migen/fhdl/namer.py
	migen/fhdl/tools.py
	migen/fhdl/verilog.py