libc: add optimized linaro bzero routine
Revert neon version  neon version of pow()

Change-Id: I154a737c353b90be5f508309180fbb16f1d11694
Revert "Revert neon version  neon version of pow()"

This reverts commit fd3d4e1033f273036d74389895bb8d4b8d8f6496.
Fix Error: .size expression for pow does not evaluate to a constant

Change-Id: Ifbef7ddec11044920a0d14e7f90e5cba6671c754
FORTIFY_SOURCE: remove memcpy overlap checks

These checks haven't been as useful as I hoped, and it's
causing a false positive finding.  Remove the overlap
compile time checks.

Change-Id: I5d45dde10ae4663d728230d41fa904adf20acaea
Add optimized version of memset for Cortex A9

Adds new code to function memset, optimized for Cortex A9.

Copyright (C) ST-Ericsson SA 2010

Added neon implementation

Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.

Change-Id: Id3c87767953439269040e15bd30a27aba709aef6
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
Revert "memcmp: prefetch optimizing for ARM Cortex-A8/A9"

This reverts commit 579dba196255d3f2db7664cfba2db4cb86f59aa9.
Add optimized version of memcmp for Cortex A9

Adds new code to function memcmp, optimized for Cortex A9.

Copyright (C) ST-Ericsson SA 2010

Added neon optimization

Change-Id: I8864d277042db40778b33232feddd90a02a27fb0
Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
Tests for string routines.

Change-Id: I24068a228f59df1c3b758c5b2026a09720490616
Signed-off-by: Anna Tikhonova <anna.tikhonova@intel.com>
glibc 2.15 treats errno as signed in strerror(3).

And the only reason I hadn't done that in bionic is because I wanted to behave
the same as glibc.

Change-Id: I2cf1bf0aac82a748cd6305a2cabbac0790058570
Add stack canaries / strcpy tests.

Add a test to ensure that stack canaries are working
correctly. Since stack canaries aren't normally generated
on non-string functions, we have to enable stack-protector-all.

Add a test to ensure that an out of bounds strcpy generates
a runtime failure.

Change-Id: Id0d3e59fc4b9602da019e4d35c5c653e1a57fae4
fix strerror_r test

e6e60065ff093ff8c859ab146cf543531cb1967c modified strerror_r to
treat errno as signed. However, the change to the test code
modified the "strerror" test, not the "strerror_r" test.

Make the same change for the strerror_r code.

Change-Id: Ia236a53df5745935e229a4446a74da8bed0cfd7b
FORTIFY_SOURCE: optimize

Don't do the fortify_source checks if we can determine, at
compile time, that the provided operation is safe.

This avoids silliness like calling fortify source on things like:

  size_t len = strlen("asdf");
  printf("%d\n", len);

and allows the compiler to optimize this code to:

  printf("%d\n", 4);

Defer to gcc's builtin functions instead of pointing our code
to the libc implementation.

Change-Id: I5e1dcb61946461c4afaaaa983e39f07c7a0df0ae
Simple google3-compatible benchmarking.

Based on our open-source RE2 benchmarking code.

Includes benchmarks for a handful of <string.h> functions.

Change-Id: I30eb70d25dbf4ad5f2ca44976a8ce3b1ff7dad01
Add a memmove(3) benchmark.

Change-Id: I9c0ffae0b5aae29521b7e68e5ce2318b5a401cba
libm: Enable fast pow(), memmove, memcmp, and memset for all NEON-capable devices

Change-Id: I2d9008f220bc634579628407a56d8c04816a9578
Fix perf regression on Cortex A15 by optimized memcpy for Cortex A9

The new Cortex A9 optimized memcpy included an arm-only version that is
slower than the current neon Cortex A15. This arm-only version was used
when the dst was aligned to an 8 byte boundary, otherwise, the original
neon only version was used. This change modifies the code so it always
uses the neon only version for the Cortex A15. It also fixes the use of
a define removed with the previous optimization.

Change-Id: I971527568a177218cd8b76a8bd160aaaf6ea1e42

Conflicts:
	libc/arch-arm/bionic/memcpy.S
Revert "Fix perf regression on Cortex A15 by optimized memcpy for Cortex A9"

This reverts commit 2f0c1bca452c07b07eef549d8b2b1cc3670451d4.
Add optimized version of memcpy for Cortex A9

Adds new code to memcpy function, optimized for Cortex A9.
Adds new ARM-only loop, for operations where source and
destination are aligned.

Copyright (C) ST-Ericsson SA 2010

Modified neon implementation to fit Cortex A9 cache line size,
for those running 32 bytes L2 cache line size.
Also split the implementation in aligned and unaligned access,
for those that allows unaligned memory access with Neon.
For totally aligned operations, arm-only code is used.

Change-Id: I95ebf6164cd6486b12a7e3e98e369db21e7e18d2
Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
Unbreak krait memcpy

Change-Id: I059dd2bb75d0a9ead75a05ae4f65f240c31d5470